International Business Machines Corporation

Calvin John Bittner

Richard Quimby Williams

Ning Lu

Josef S Watts

Bertrand M Grossman

Richard Dimick Jenks

Stephen Michael Watt

Tong Li

Peter Feldmann

Steven Alfred Grundon

Richard Daniel Kimmel

David Wells Winston

Ali Sadigh

Yoo-Mi Lee

James P Hoffmann

A system, method and computer program product for extracting integrated circuit on-chip parasitic capacitance in semiconductor structures including structures formed according to a Self-Aligned Double Patterning (SADP) semiconductor manufacturing process. A method of calculating the capacitance of a conductive signal wire in a SADP layer whose adjacent wires or groups of wires are floating (not connected to a circuit or net and not signal carrying). Further, there is provided a system running an iterative method for accurately and efficiently eliminating a group of floating metals by eliminating one floating metal wire per iteration while extracting its corresponding on-chip parasitic coupling capacitance effect. Further, system and methods calculate parasitic capacitance calculation for an 'isolated' wire(s) or a 'semi-isolated wire' resulting from employing a Self-Aligned Double Patterning (SADP) processing technique. The system and method provides a capacitance calculation and circuit simulation solution without involving use of and without computing a capacitance matrix.

Capacitance extraction method for semiconductor SADP metal wires

An on-demand table model for semiconductor device evaluation is provided. A method of providing on-demand table models for semiconductor device evaluation, includes measuring one or more measurement values of an instance of a semiconductor device. The method further includes providing, by a processor, a table model of the instance for the semiconductor device evaluation upon receiving a request for the semiconductor device evaluation. The method further includes generating a table entry in the table model for the one or more measurement values, the table entry including one or more evaluation values of an evaluation function for the instance.

On-demand table model for semiconductor device evaluation

A method, system and program product are disclosed for statistical modeling an integrated circuit that provides information about partial correlations between model parameters. The invention determines a variance-covariance matrix for data to be modeled; conducts principal component analysis on the variance-covariance matrix; and creates a statistical model with an independent distribution for each principal component, allowing calculation of each individual model parameter as a weighted sum by a circuit simulator. The statistical model provides information about how well individual transistors will track one another based on layout similarity. This allows the designer to quantify and take advantage of design practices that make all transistors similar, for example, by orienting all gates in the same direction. A method, system and program product for simulating a circuit using the statistical model are also included.

Circuit statistical modeling for partially correlated model parameters

A method for optimizing and transforming a compiler program in a computer system. The method comprises the steps of constructing a compiler comprising a program augmentation capability; and, locating this capability in association with phases of a standard compilation process. The program augmentation capability may comprise symbolic automatic differentiation, or generation of Taylor series, or generation of Hessian or Jacobian matrices.

Computer-program compilers comprising a program augmentation capability

A method of determining a set of parameters for modeling an active semiconductor device in which current flow through a channel or other area is regulated by voltage applied to the device terminals, for example, MOSFETs. The method comprises first providing a plurality of measured values for current as a function of voltage for a plurality of active semiconductor devices of differing geometries. There is then determined an initial population of vectors comprising individual values representing a plurality of desired active semiconductor device model parameters. Fitness is then evaluated for each of the vectors by comparing calculated values for current as a function of voltage from the population to the plurality of measured values for current as a function of voltage of the vectors, converting any current differences to voltage errors and adding any such voltage errors together to arrive at a fitness value for each vector. Vectors of best fitness are selected and at least one genetic operator is applied thereto to create a new population of the vectors. Vectors of best fitness are then selected. The steps of evaluating fitness and selecting vectors of best fitness are optionally repeated for such vectors of best fitness until a desired fitness is achieved to determine the desired active semiconductor device model parameters.

Method of determining model parameters for a MOSFET compact model using a stochastic search algorithm

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Essex Junction, VT, United States of America

Calvin John Bittner