Tektronix, Inc.

Calvin D Diller

Theodore G Nelson

Douglas C Stevens

Robert David Meadows

Todd M Beazley

Michael J Burke

Donald D Gladden

A method and circuit for triggering an electronic instrument only once during a period of an input signal having multiple triggering events during that period. A signal applied to an electronic instrument, such as an oscilloscope, is acquired. Qualified triggering events occurring on the acquired signal are identified. A selected one of the qualified triggering events during the period of the applied signal causes a trigger signal output to occur, while other qualified triggering events are ignored. In the preferred embodiment a triggering event is qualified by a first comparator that compares the input signal to a first reference level and produces a predetermined logic level output if the input signal bears a predetermined relationship to the reference level. When a qualified triggering event occurs, a buffer amplifier applies the predetermined logic level to charge a capacitor, which thereafter stores some energy from the input signal and applies it to a comparator for a predetermined period of time. The comparator compares the voltage on the capacitor to a second reference level and produces a pulse if the capacitor voltage has a predetermined relationship to the second reference level. The leading edge of the pulse comprises a trigger output signal. Subsequent triggering events which occur before a predetermined period of time are unable to produce another trigger signal. Five alternative embodiments employing the same general principle as the preferred embodiment are disclosed.

Method and circuit for triggering an electronic instrument only once

An instrument for providing a principal display representing the variation of a first quantity as a function of a second quantity, comprises a display screen. A visually distinct dot is generated on the display screen and is deflected along one of two orthogonal axes in dependence upon the value of the first quantity and along the other axis in dependence upon the value of the second quantity. The dot is additionally deflected to selected positions along the two axes to generate an auxiliary display of a marker and of an information-conveying character adjacent the marker. The position of the auxiliary display is adjustable along at least one of the axes.

Oscilloscope having auxiliary display of a labelled cursor

In an oscilloscope, a readout control circuit is adapted to create a horizontal cursor on an oscilloscope screen at a vertical level controlled by cursor level data generated by a microcomputer, and to cause the beam to form characters on the screen indicating a voltage represented by the vertical level of the cursor. Vertical offset and vertical gain parameters characterizing a vertical preamplifier system controlling display of a waveform are measured and utilized to determine the value of cursor level data needed to cause the readout control circuit to position the cursor on the screen to accurately reflect a selected voltage with respect to voltage magnitudes represented by points on the displayed waveform. The oscilloscope is adapted to measure peak magnitudes of a vertical preamplifier input signal, and the readout control circuit permits the oscilloscope to display a cursor on a screen at a level indicating the magnitude of the measured peak with respect to magnitudes represented by a displayed waveform.

Oscilloscope-based signal level measurement system

A timebase generator includes a transistor switch performing a sweep gate function, alternately providing a current path for retrace and then disconnecting such current path to allow generation of a time base ramp. The bias current delivered to the switch is controlled to be at a high level for bringing about proper retrace, but at a low level at the beginning and ending of the time base sweep itself to prevent undesired transients and nonlinearity effects. The low current is maintained from the end of the retrace period until the start of the following retrace period. A baseline stabilizer loop comprises a transistor circuit for accurately predetermining the baseline reference wherein the emitter current of the transistor is controlled to a substantially constant value during operation for enhanced stability. The undesirable effect produced by inherent capacitance of a semiconductor device current source used for charging the timebase generator timing capacitor is neutralized by means of a matching semiconductor device interposed between the timebase generator output and an input electrode of the first mentioned semiconductor device.

Timebase generator with improved linearity and recovery time

A level shift circuit for shifting the common mode level of the output signal provided by a differential amplifier has first and second input terminals for receiving the output signal from the differential amplifier, which has a Thevenin source impedance R.sub.s, and also has first and second output terminals that are connected to a reference voltage level through a load impedance R.sub.o. The circuit comprises a differential transconductance amplifier having two output terminals that are connected respectively to the first and second output terminals of the circuit. The amplifier has the property that it responds to an input voltage E.sub.e between its input terminals by providing a current equal to E.sub.e g.sub.ml /(1+.tau.s) (where g.sub.ml is the transconductance of the amplifier, .tau. is the response time constant of the amplifier and s is the Laplace transform operator) at its output terminals. Two equal-valued capacitors are connected respectively between the first input terminal of the circuit and the first output terminal of the circuit and between the second input terminal of the circuit and the second output terminal of the circuit, the capacitance C.sub.c of each capacitor being such that R.sub.s C.sub.c is much greater than .tau.. The circuit also comprises two equal-valued resistors connected in series between the first input terminal of the circuit and the second output terminal of the circuit and having their connection point connected to one of the input terminals of the amplifier, and two more equal-valued resistors connected in series between the first output terminal of the circuit and the second input terminal of the circuit and having their connection point connected to the other of the two input terminals of the amplifier. The value of g.sub.ml is selected to be equal to (1/2R.sub.s +1/R).

Level shift circuit for differential signals

An amplifier includes first and second transistors having emitters connected to a first current source, feedback from the second transistor collector to its base being supplied through a base-emitter path of a first Darlington pair in series with a first diode. A second current source is connected to the first Darlington pair emitter. Third and fourth transistors have emitters connected to a third current source with feedback supplied from the fourth transistor collector to its base through a second Darlington pair and a second diode. The second Darlington pair emitter is connected to a fourth current source and resistively coupled to the first Darlington pair emitter. Constant currents are supplied to the second and fourth transistor collectors and an input voltage across the first and third transistor bases controls allocation of current between the first and second Darlington pair emitter-collector paths to produce a differential output current proportional to the input voltage when both Darlington pairs are on. When the input voltage is highly negative, the first Darlington pair turns off and a biasing circuit reverse biases the first diode to prevent the second transistor from saturating and substantially discharging capacitance at the base of the first Darlington pair. Thus, the first Darlington pair can rapidly turn on when the input voltage is subsequently driven more positive. When the input voltage is highly positive, another biasing circuit reverse biases the second diode to prevent the fourth transistor from saturating.

Fast recovery amplifier

A switched attenuator circuit providing three selectable voltage-divider ratios including one which passes substantially 100 percent of the input signal. The circuit places constant load resistance on its source in all positions when driving a high-resistance load. The circuit is inexpensive to construct, comprising three attenuation resistors, two input resistance compensating resistors, and two single-pole double-throw switching elements for changing the series/parallel configuration of the attenuation resistors and switching the compensating resistors into the circuit. The circuit places all parasitic capacitance associated with the switches on the input side of the circuit, thereby providing uniformly low output capacitance for all voltage-divider ratios.

Low impedance switched attenuator

The present invention provides a system for applying a fixed level D.C. voltage and a square wave signal sequentially to a voltage divider including a resistor of a known impedance and the device under test. The square wave ranges from a value which is substantially equal to the ground level to a level that is substantially twice the nominal value of the fixed D.C. level, thus the average value of the square wave signal is substantially equal to the nominal value of the fixed level D.C. voltage. With each of these signals applied on at a time to the voltage divider, the voltage across the device under test is applied to a voltage detector via a low pass filter. The output of the low pass filter for each applied voltage signal is the average of the voltage signal which appears across the device under test. The value of these average voltages are stored and then compared. If the average values are substantially equal, then the device under test is linear, and knowing the average voltage value, the nominal voltage value, and value of the known resistor, the resistance value of the device under test can be calculated. If the average values of the voltages across the device under test varies from the application of the fixed level D.C. voltage and the square wave signal, the device under test is non-linear, e.g. a diode or transistor junction.

Method and apparatus for detection of non-linear electrical devices

A high voltage attenuator is discussed which includes a divider having a signal input line and a plurality of signal output lines for providing an attenuated electrical signal on a selected one of the signal output lines in response to a switching control signal. A compensation means is also coupled to said divider means to provide signal compensation to the attenuated electrical signal in response to the switching control signal, together with switching control means coupled to the divider means to provide the switching control signal.

Compensation of a high voltage attenuator

A D.C. stabilization circuit is provided for a follower-type amplifier in which a correction current is generated to maintain a constant operating point of the follower device. A blocking capacitor between a signal source and the follower device permits the bias voltage to self adjust. In a preferred embodiment, the correction current is generated by a transconductance amplifier which compares the output voltage with a signal input voltage, and the correction current is connected directly to the junction of the blocking capacitor and the input of the follower device. The follower device may suitably be a field-effect transistor, a bipolar transistor, or a multi-stage follower composed of both types of devices.

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Hillsboro, OR, United States of America

Calvin D Diller