Silicon Laboratories Inc.

Mediatek Corporation

Cirrus Logic Inc.

Mediatek Singapore Pte. Ltd.

St-ericsson Sa

Caiyi Wang

David R Welland

Donald A Kerth

Nadi Rafik Itani

Jeffrey William Scott

Richard T Behrens

Hsin-Hung Chen

G Tyson Tuttle

Vishnu Shankar Srinivasan

G Diwakar Vishakhadatta

Lysander Lim

Jenwei Ko

Narayanan Baskaran

Augusto Manuel Marques

Ramkishore Ganti

Po-Sen Tseng

Ravikanth Venkata Suravarapu

Aslamali A Rafi

Gregory Takeo Uehara

Chih-Yuan Lin

Tod Paulus

Yen-Horng Chen

Jing Li

James P Maligeorgos

Wen-Chang Lee

Wei-Hsin Tseng

Xiaochuan Guo

Ming-Chou Wu

Chieh-Hsun Hsiao

Changhua Cao

Saravanan Rajapandian

Hsiang-Hui Chang

Douglas R Holberg

George Chien

Chih-Jung Chen

Sandra Marie Johnson

Alan Wayne Hansford

Brannon Craig Harris

Augusto Marques

Syed Khalid Azim

Tzyuan Shiu

Ash Prabala

I-No Liao

Wei-Kai Chang

Shih-chung Chao

Solti Peng

Described herein are systems with switchable circuitry configured to selectively couple transmitter outputs to processing hardware, which may selectively route subsets of distortion measurements from transmitters for DPD processing that compensates for the measured distortion. The switchable nature of the distortion measurement propagation paths permits the paths to be made substantially shorter than static paths, resulting in improved (e.g., reduced and/or more uniform) attenuation and/or phase change across a transceiver array. In one example, measurement propagation paths may be no longer than a row or column of the array. In some embodiments, systems described herein may be suitable for implementation at mmW transmit and/or receive frequencies, where the length of measurement paths may have a significant impact on attenuation and phase changes.

Switchable transmission line structure for digital pre-distortion (DPD) in millimeter wave phased array environment

A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.

Method for transferring signals via transmission interface and communications apparatus utilizing the same

A transmission interface between at least a master module and a slave module is proposed. The transmission interface includes a predetermined number of physical transmission medium(s). Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated, and the predetermined number is not smaller than a number of intermediate frequency (IF) stream(s) to be transmitted.

Power combiners and splitters are commonly used as components for handling radio frequency (RF) signals. Disclosed herein are power combiner/splitters and methods to operate the same to reduce power loss when not all the ports are used. When an input/output port of a power combiner/splitter is unused or inactive, switches may be provided to cut off the port from the rest of the power combiner/splitter, which has programmable quarter-wave elements and resistors that are adjustable based on the number of remaining input/output ports that are active, such that in effect, the circuit operates similarly to a multi-way Wilkinson power combiner/splitter, and power loss due to inactive ports may be reduced or eliminated.

Programmable power combiner and splitter

A class-F power amplifier (PA) with a matching network is disclosed herein. The class-F PA comprises a first switch and a second switch operating in differential mode, with a second harmonic trap circuitry selectively terminating the drain terminals to ground at a second harmonic frequency. The second harmonic trap circuitry comprises a plurality of lumped inductive and capacitive components. The PA further comprises a common mode trap and a matching network to reduce the imbalance of the drain terminal impedance between first harmonics and third harmonics.

Class-F power amplifier matching network

According to at least one aspect, a communication system is provided. The communication system includes a power amplifier configured to amplify an input signal to generate an amplified output signal and provide the amplified output signal to an antenna, a power supply coupled to the power amplifier and configured to provide power to the power amplifier based on a power supply control signal, and a controller coupled to the power supply. The controller is configured to identify a target transmit power level for transmission of a wireless signal, generate the power supply control signal based on the target transmit power level using information indicative of a relationship between the target transmit power level and a setting of the power supply, generate performance information indicative of a characteristic of the communication system when the wireless signal is transmitted, and update the information indicative of the relationship using the performance information.

Adaptive power amplifier supply with pre-distortion mechanism

A current buffer used in a receiver arrangement includes a direct path mode and a mirror path mode. The direct path mode includes a plurality of first set of transistors and a plurality of first set of current sources turned on while all remaining transistors and current sources are turned off, during the direct path mode a current signal at an input node directly appears at an output node. The mirror path mode includes a first transistor and a first current source being turned off while a plurality of second set of transistors and a plurality of second set of current sources are turned on. The current signal goes through a current mirror pair and appears at the output node with a gain which is controlled by slicing one of transistors of the current mirror pair and a second current source allowing multiple gains in the mirror path mode.

Low noise, programmable gain current buffer

A receiver includes LNA-mixer arrangement, a current buffer arrangement and an analog filter arrangement. The LNA-mixer arrangement receives a plurality of input signals and provides a wide-band input match for a specified frequency range of operation. The LNA-mixer arrangement includes a plurality of LNA structures and a plurality of mixer structures where each of the LNA structure path is coupled to a single mixer structure. The LNA-mixer arrangement outputs a first signal. The current buffer arrangement receives the first signal and reduces the Image Rejection (IR) asymmetry between the high frequency portion and the low frequency portion of the first signal as well as provides a gain to the first signal. The current buffer arrangement outputs a second signal. The analog filter arrangement receives the second signals and perform filtering and calibration.

Receiver arrangement and method of performing operations of receiver

A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

Method and apparatus for reducing interference

An integrated circuit device includes at least one controllable oscillator including a first control port and at least one further control port, at least one frequency control module including an output arranged to provide a frequency control signal. The at least one controllable oscillator further includes at least one compensation module including an output arranged to provide at least one compensation signal. The at least one compensation module includes an integrator component arranged to receive at an input thereof a signal that is representative of a difference between the indication of the frequency control signal and a reference signal, and to output an integrated difference signal. The at least one compensation module is arranged to generate the at least one compensation signal based at least partly on the integrated difference signal output by the integrator component.

Integrated circuit device, electronic device and method therefor

Embodiments of a time-to-digital converter are provided, comprising a delay stage matrix and a measurement circuit. The delay stage matrix comprises a first and a second delay lines coupled thereto, and is arranged to propagate a transition signal from a starting delay stage in the first and a second delay lines, wherein each of the first and second delay lines comprises a same number of delay stages coupled in series, each delay stage in one of the first and second delay lines is coupled to a corresponding delay stage in the other delay line and operative to generate a delayed signal. The measurement circuit is arranged to determine a time of the transition signal propagating along the delay stages by sampling the delayed signals using a measurement signal to generate and hold a digital representation of the time.

Time-to-digital converter

Growing community of inventors

Austin, TX, United States of America

Caiyi Wang