Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Daewoo Electronics Co., Ltd.

Media Technology Corporation

Byung-Sun Kim

Tae-Jung Lee

Young-Gun Ko

Young-wug Kim

Joon-Hyung Lee

Hee-Sung Kang

Sung-bae Park

Sang-Soo Kim

Cheol-Woo Park

Sang-Wook Park

Hong-Soo Kim

Cheol-Hee Kim

Myoung-hwan Oh

Oh-Kyum Kwon

Tae-jung Lee

Seung-han Yoo

Myung-sun Shin

Dong-Hoon Lee

Min-Su Kim

Hui Nam

Jung-Won Kim

Nam-Gon Choi

Dae-Gwang Jang

Bon-Seog Gu

Myung-Ho Lee

Jae-Hyeon Jeon

Min-Su Jung

Jae-Hyun Cho

Min-su Kim

Ji-Myoung Seo

Kwang-Il Kim

Kwang-il Kim

Sang-Mi Kim

Ja-Kyoung Jin

Hyun-Sik Hwang

Myoung-Kyu Park

Seok-Ha Hong

Hyun-Mi Cheong

Kyoung-Eun Uhm

Kyoung-Eun Uhn

Kee-in Bang

Joon-Hung Lee

Kyung-Soo Seok

Seung-Hwa Park

Sung-Dae Park

Tae-Youl Kang

Se-Hyuk Park

A key button and a method of manufacturing the same are provided. The key button includes an upper surface, a side surface formed at a certain height along a border of the upper surface, and at least two worked surfaces formed to have a certain slope in a boundary portion between the side surface and the upper surface, wherein at least one first worked surface and at least one second worked surface are formed such that a shortest distance between the upper surface and the side surface differs from each other.

Key button and method of manufacturing the same

A display panel includes gate lines, data lines, and pixels. The gate lines extend in a first direction and include first and second gate lines adjacent to each other. The data lines extend in a second direction crossing the first direction and include first to third data lines. Each of the pixels is connected to one of the gate lines and one of the data lines. The first data line is connected to at least a first any one of a second plurality of pixels in a first pixel column of the pixels. The second data line is connected to at least a first any one of a first plurality of pixels in the first pixel column. The third data line is connected to at least a second any one of the first plurality of pixels and at least a second any one of the second plurality of pixels.

Display panel and a display apparatus including the same

A display apparatus includes a display and a controller. The display includes a plurality color sub-pixels, each including an organic light emitting diode and a driving transistor to drive the organic light emitting diode. The driving transistor drives in a saturation region for a normal mode and in a linear region for a standby mode. The controller controls a first portion of preset-color sub-pixels among the color sub-pixels to emit light and a second portion of the preset-color sub-pixels among the color sub-pixels to not emit light in the standby mode.

Display apparatus and method of driving the same

An electronic device is provided that includes a front housing arranged in a front portion of the electronic device, and a bracket connected to the front housing, to which a plurality of electronic parts of the electronic device are affixed. The electronic device also includes a rear housing arranged in a rear portion of the electronic device and including at least one slider and at least one rail. Each of the at least one slider is connected to a respective rail. The at least one slider is slidable on and elastically supported by the at least one rail, without being released from the at least one rail. The rear housing is detachable from the bracket by the at least one slider.

Electronic device and assembly structure thereof

A display apparatus having an edge determiner configured to determine an edge area of the moving object based on moving direction and moving speed corresponding to the moving vector. The display apparatus also includes a gamma output controller configured to output normal high data of a high gamma curve and normal low data of a low gamma curve as gamma data of input data corresponding to a remaining area except for the edge area, and to output enhanced high data of the high gamma curve and enhanced low data of the low gamma curve as gamma data of input data corresponding to the edge area, in both time division method and space division method based on a spatiotemporal sequential pattern.

Display apparatus and method of driving the display apparatus

A display panel driving apparatus includes a first switching element and a second switching element. The first switching element applies first pixel data to a first pixel connected with a first data line of a display panel during a first sub frame period. The first switching element is connected with a data channel of a data driving part. The second switching element applies second pixel data having a level higher than a level of the first pixel data to a second pixel connected with a second data line of the display panel during a second sub frame period. The second switching element is connected with the data channel. Thus, display quality of a display apparatus may be enhanced.

Method of driving a display panel using switching elements between data channels and data lines and display panel driving apparatus for performing the method

A nonvolatile memory device has a first active region and a second active region defined in a substrate by a device isolation layer, a Metal Oxide Silicon Field-Effect Transistor (MOSFET) disposed on the first active region and including a first electrode pattern, and a Metal Oxide Silicon (MOS) capacitor disposed on the second active region and including a second electrode pattern, and in which the first electrode pattern is narrower in the widthwise direction of the channel of the MOSFET than the first active region.

Nonvolatile memory device and method of forming the same

A keypad lighting device includes: a keypad member formed by an arrangement of plural key tops; at least one light emitting device arranged below the key pad member; and a light guide plate member arranged below the keypad member to light the key tops with light projected from the light emitting device. The light guide plate member is formed with at least one light-incident surface, to which the light projected from the light emitting device is incident. The light-incident surface is formed by a curved surface or plural inclined surfaces, and at least one of the normal lines of the light-incident surface is arranged to pass through the light emitting surface of the light emitting device.

Keypad lighting device for portable terminal

A keypad assembly includes an operation member deformed according to user's manipulation to operate key switches, a binding member disposed on a top surface of the operation member, binding pieces extending and bent from the binding member to enclose sides of the operation member on an edge of the binding member, and a manipulation member disposed on a top surface of the binding member, the manipulation member including at least one key tops, in which the binding members are bound onto inner side walls of a housing of the portable terminal.

Keypad assembly for portable terminal

Semiconductor device having an on-chip type electrostatic discharge (ESD) protection circuit and a method of manufacturing the same are provided. The on-chip type ESD protection circuit may include a first junction diode having a first conductive type region contacting a second conductive type region in a semiconductor substrate, and a first schottky diode having a metallic material layer arranged on and contacting the first conductive type region of the semiconductor substrate.

Semiconductor device having electrostatic discharge protection circuit and method of manufacturing the same

A method of fabricating a semiconductor device having a non-volatile memory cell includes forming an insulation layer as an uppermost/outermost portion of the memory cell to enhance the charge retention capability of the memory cell. The insulation layer is formed after the gate structure and integrate dielectric of the non-volatile memory cell, and a gate of a logic transistor are formed. The insulation layer thus enhances the function of the intergate dielectric. Subsequently, a conductive layer is formed on the substrate including over the gate of the logic transistor. A silicide layer is then formed on the gate of the logic transistor and on the substrate adjacent opposite sides of the gate. The insulation layer thus also serves prevent the formation of a silicide layer on the non-volatile memory cell.

Semiconductor device and method of fabricating the same

A cell structure of a non-volatile memory device, which uses a nitride layer as a floating gate spacer, includes a gate stack and a floating gate transistor formed over a semiconductor substrate. The gate stack includes a first portion of a floating gate, a control gate formed over the first portion of the floating gate, and a non-nitride spacer adjacent to sidewalls of the first portion of floating gate. The floating gate transistor includes a second portion of the floating gate, which substantially overlaps a source and/or drain formed in the substrate. The application of ultraviolet rays to the non-nitride spacer of a programmed cell can causes the second portion of the floating gate to discharge, thereby easily erasing the programmed cell.

Method for fabricating cell structure of non-volatile memory device

Provided are a cell structure of an EPROM device and a method for fabricating the same. The cell structure includes a gate stack, which includes a first floating gate, an insulating pattern including a nitride layer, and a control gate that are sequentially stacked on a semiconductor substrate, and includes a window for exposing the top surface or both sidewalls of the first floating gate on both sides of the control gate, so that charges of the first floating gate can be erased by ultraviolet rays. The cell structure further includes a floating gate transistor, which includes a gate insulating layer formed on the semiconductor substrate, a second floating gate that is formed on the gate insulating layer and is connected to the first floating gate in the gate stack, and a source/drain that is formed in the semiconductor substrate so as to be aligned to the second floating gate. In the cell structure, the window is formed on the top surface or both sidewalls of the first floating gate of the gate stack. Thus, ultraviolet rays can penetrate through the window and easily erase charges of the programmed cell.

Cell structure of EPROM device and method for fabricating the same

A dual port semiconductor memory device, including PMOS scan transistors, is provided. The dual port semiconductor memory device includes two PMOS transistors, two NMOS pull-down transistors, two NMOS pass transistors, and a PMOS scan transistor. The scan transistor being PMOS, noise margins can be improved. In addition, these seven transistors are arranged in two n-wells and 2 p-wells, while n-wells and p-wells are arranged in series and in alternating fashion. Therefore, the length of a memory cell along the minor axis of the memory cell is relatively short. This memory cell layout helps shorten the length of a bit line by arranging a pair of bitlines in parallel with well boundaries, i.e., in the direction of the short axis of the memory cell, and makes it possible to prevent crosstalk between a bitline and a complementary bitline by arranging conductive lines between the bitline and the complementary bitline.

Dual port semiconductor memory device

Growing community of inventors

Seoul, South Korea

Byung-Sun Kim