Samsung Electronics Co., Ltd.

Byung-Seong Bae

Byung-Hoo Jung

Chang-Won Hwang

Byoung-Sun Na

Min-Koo Han

Byung-Hyuk Min

Jin-Tae Yuh

Cheol-Min Park

A source electrode and a metal pattern for a storage capacitor are formed on an insulating substrate, a silicon layer having a doped source region and a doped drain region is formed on the substrate and the source and the drain regions directly contact to the source electrode and the metal pattern. A gate insulating film is formed thereon, and a storage electrode is formed on the gate insulating film opposite the metal pattern. A passivation film covering the storage electrode is formed and the pixel electrode is formed thereon. The pixel electrode is directly connected to the drain region or to the metal pattern.

Method for manufacturing a liquid crystal display

Liquid crystal display having a source electrode and a metal pattern for a storage capacitor formed on an insulating substrate

Liquid crystal display and a method for manufacturing the same

Liquid crystal displays and manufacturing methods thereof the interlayer insulating film having a thinner depth

Liquid crystal displays, manufacturing methods and a driving method thereof

The liquid crystal display also includes pixels which is arranged in a matrix shape and have a liquid crystal capacitor and a switching element. A plurality of storage capacitors has two terminals connected to the switching elements of at least two adjacent pixels. Each pixel except the pixels located at one end of the matrix has at least two storage capacitors, while the pixels located at the end of the matrix have only one respective storage capacitor. Each pixel placed at the other end of the matrix has a storage capacitor having a terminal which is floating or connected to the previous gate line. The pixels located at the ends of the matrix are not used for display.

Liquid crystal displays having switching elements and storage capacitors and a manufacturing method thereof

Methods of forming thin-film transistor display devices having coplanar gate and drain lines include the steps of forming gate and data lines using the same level of metallization and also using an etch stop layer to protect the active regions of the TFTs in each of the display cells. A preferred method includes the steps of forming a first conductive layer on a substrate and then patterning the first conductive layer to define a plurality of parallel gate lines and a plurality of parallel data lines which each comprise a plurality of data line segments. A first electrically insulating layer is then formed on the data and gate lines. A first undoped amorphous silicon (a-Si) layer is then formed on the first electrically insulating layer and patterned to define an amorphous silicon active region for each cell. A second electrically insulating layer is then formed on the amorphous silicon active region. The first and second electrically insulating layers are then patterned to expose source and drain portions of the amorphous silicon active region and define at least one data line contact hole which exposes a portion of a data line segment for each cell. A second amorphous silicon layer of first conductivity type (e.g., N-type) is then formed on the exposed source and drain portions of the amorphous silicon active region and in the data line contact holes. An optically transparent conductive layer (e.g., indium-tin-oxide (ITO)) is then formed on the second amorphous silicon layer. Then, the optically transparent conductive layer and the doped second amorphous silicon layer are etched to define a source electrode (which electrically connects the data line to the source portion of the amorphous silicon active region) and define a pixel electrode (which is electrically connected to the drain portion of the amorphous silicon active region).

Thin-film transistor display devices having coplanar gate and drain lines

Methods of forming thin-film transistors include the steps of forming an amorphous silicon (a-Si) layer of predetermined conductivity type on a face of an electrically insulating substrate and then forming a first insulating layer on the amorphous silicon layer. The first insulating layer and amorphous silicon layer are then patterned to define spaced amorphous source and drain regions having exposed sidewalls. An amorphous silicon channel region is then deposited in the space between the source and drain regions and in contact with the sidewalls thereof. An annealing step is then performed to convert the amorphous source, drain and channel regions to polycrystalline silicon, prior to the step of forming an insulated gate electrode on the channel region.

Methods of forming nonmonocrystalline silicon-on-insulator thin-film

Liquid crystal display devices include a matrix of thin-film transistor (TFT) display cells and storage capacitors to capacitively cross-couple pixel electrodes of adjacent display cells together in an efficient manner to improve display resolution. A preferred display device includes a plurality of liquid crystal display cells and spaced storage capacitors which are directly cross-coupled between pixel electrodes of display cells in adjacent rows and/or columns of cells. Here, the spaced storage capacitors each have a first electrode electrically connected to a pixel electrode in one display cell and a second electrode spaced opposite the first electrode and electrically connected to a pixel electrode in another adjacent display cell in the same column or row of display cells. Preferably, the first electrodes of the storage capacitors are contiguous with the pixel electrodes of a respective display cell and the second electrodes of the storage capacitors are electrically connected at ends thereof to respective pixel electrodes by a conductive via. By directly cross-coupling pixel electrodes of closely adjacent display cells together, improved display resolution can be achieved. For example, in the event a pixel electrode of a display cell cannot be properly loaded, the data (e.g., charge) from closely adjacent cells can be shared efficiently by direct cross-coupling to improve overall display resolution, particularly when the data to be loaded into the adjacent display cells is the same.

Thin-film transistor liquid crystal display devices having cross-coupled

A method for manufacturing a semiconductor device which utilizes anodic oxidation. A first semiconductor layer of a first conductive type is formed on an insulating substrate, a highly doped second semiconductor layer of the first conductive type is formed on the first semiconductor layer, and then an anti-oxidizing pattern is formed on the second semiconductor layer to expose a predetermined portion of the second semiconductor layer. After forming the anti-oxidizing pattern, anodic oxidation is performed to oxidize the exposed portion of the second semiconductor layer. Instead of employing a conventional plasma etching process for removing the portion of the ohmic contact layer which is not in contact with the source and drain electrodes, the portion of the ohmic contact layer to be removed is subjected to anodic oxidation, to thereby form an anodic oxidation layer, thus facilitating removal of the unnecessary portions of the ohmic contact layer without the use of a plasma etching step. Accordingly, the problems resulting from the use of a plasma etching process can be avoided, so that a TFT having a high reliability can be obtained.

Growing community of inventors

Kyungki-do, South Korea

Byung-Seong Bae