Samsung Electronics Co., Ltd.

Byung Man Kim

Jeong Ho Bang

Dae Woo Son

Youn Soo Lee

Shin Hyoung Kim

Ho Tae Jin

Young Jae Song

Chang Wook Kim

In Pyo Hong

Hun Yong Park

Yoon Suk Han

Jae Ky Roh

Seong Jae Hong

Il Heung Choi

A side view LED package for a backlight unit includes a package body having a cavity with an inclined inner sidewall, first and second lead frames arranged in the package body, the cavity of the package body exposing a portion of at least one of the first and second lead frames placed in a bottom of the cavity to outside, a light emitting diode chip mounted on the bottom of the cavity to be electrically connected to the first and second lead frames, and a transparent encapsulant arranged in the cavity surrounding the light emitting diode chip. The cavity has a depth larger than a mounting height of the light emitting diode chip and not exceeding six times of the mounting height. The height of the sidewall is shortened to improve beam angle characteristics of emission light, increase light quantity, and prevent a molding defect of the sidewall.

Side view light emitting diode package

A lighting device is provided. The lighting device includes: a light source module mounted on a substrate; a lens unit provided on the light source module and including an accommodating groove accommodating the light source module; a housing unit accommodating the lens unit therein to protect the lens unit from an outside; a supporting unit fixed to the substrate and including a coupling hole having the housing unit coupled thereto to thereby support the housing unit; and a height adjustment unit allowing the housing unit to be vertically-movably coupled to the supporting unit and adjusting a height of the lens unit such that the height of the lens unit is varied.

Lighting device

On a semiconductor wafer, recognition marks are fabricated on the crossing points of scribe lines for the purpose of proper wafer alignment in wafer sawing process. Since the recognition mark has a distinctive pattern that is distinguished from other circuit patterns on the chip, the recognition mark can be easily recognized by a camera in a sawing apparatus, and reduce the chance of wafer misaligning. When a part of circuit pattern on the semiconductor chip is used for the alignment purpose, the chance of wafer misalignment relatively high due to the similarity between the part chosen and other parts of the circuit pattern. The present invention also provides a method for sawing the wafer using the recognition marks.

Semiconductor wafer on which recognition marks are formed and method for sawing the wafer using the recognition marks

A method for manufacturing lead-on-chip (LOC) semiconductor packages includes steps of preparing a lead frame having inner leads and outer leads, and applying a liquid adhesive having a certain viscosity to the bottom surfaces of the inner leads. The method also includes positioning a semiconductor chip under the lead frame, to expose electrode pads through the space defined between opposing rows of inner leads. The inner leads are then attached to the active surface of the semiconductor chip by means of the liquid adhesive. The adhesive applying step may be carried out using a tool having discharge projections through which liquid adhesive is discharged from a reservoir. The liquid adhesive under the lead frame may be cured and then turned into a solid adhesive layer by thermocompression. The liquid adhesive is a thermosetting resin or a thermoplastic resin.

Method for manufacturing lead-on-chip (LOC) semiconductor packages using liquid adhesive applied under the leads

A method for separating semiconductor devices formed on a semiconductor wafer includes: inscribing the semiconductor wafer along scribe lines; mounting the inscribed semiconductor wafer on a stage including an elastic structure and vacuum suction holes that can be aligned to respective semiconductor chips; applying a vacuum through the vacuum suction holes to hold the semiconductor wafer on the elastic structure; and applying a mechanical force to the semiconductor wafer to break the wafer along the scribe lines and separate the semiconductor devices. A device for separating semiconductor devices formed on a wafer includes a stage including an elastic structure and vacuum suction holes that can be aligned with respective semiconductor chips of the semiconductor wafer and a press for applying mechanical force to the semiconductor wafer on the elastic structure. Since use of a wafer tape is avoided in cutting a semiconductor wafer, package cracking and delamination caused by wafer tape adhesive stuck to the back surface of a semiconductor chip are avoided.

Chip separation device and method

A semiconductor chip packaging method includes the provision of individual elastomer chip carriers cut from an elastomer sheet having a uniform thickness and smooth, parallel surfaces. The elastomer sheet is mounted on an adhesive tape held by a fixing member, such as a support ring, and is then divided into individual carriers. The carrier is attached to a circuit interposer, and a semiconductor chip is attached to the carrier. Circuit leads of the interposer are bonded to connection pads on the chip. The beam lead bonding area is then encapsulated, and conductive bumps are formed on the underside of the package to serve as input/output terminals for the packaged device. Using this method, an number of devices can be packaged simultaneously on a flexible sheet and then separated into individual devices by cutting the sheet between the devices.

Growing community of inventors

Choongchungnam-do, South Korea

Byung Man Kim