Skhynix Inc.

Other

Goldstar, Co., Ltd.

Amkor Technology, Inc.

Amkor Technology Singapore Holding Pte. Ltd.

Byung Jun Kim

Taek Gyu Lee

Young Kyu Jeon

Kyoung Ku Cho

Yung Woo Lee

Dong Hyun Bang

EunNaRa Cho

Jae Ung Lee

Adrian Arcedera

Hui Won Lee

Eu Joon Byun

Jea Young Zhang

Jae Jin Lee

Hye Mi Kang

Min Jae Lee

Min Kyun Yoo

Jae Dong Kim

Eung Soo Kim

Seong Jun Ahn

Won Kyoo Lee

Ji Wook Kim

Jong Dae Jung

Youn Ja Jen

Jun Su Lee

Young Woo Lee

Provided herein may be an electronic device and a method of operating the same. The electronic device may include a memory device, and a controller configured to receive an inbound protocol information unit (PIU) from an external device and control the memory device based on the inbound PIU, wherein the inbound PIU includes a basic header segment including information about an extra header segment (EHS) length, and an extra header segment defined by the EHS length, and wherein the controller is configured to generate an error message depending on whether the PIU includes an error related to the extra header segment.

Electronic device for detecting error in field of protocol information unit and method of operating the same

A memory controller to control a memory device including a secure storage area may include a host interface configured to receive a command from a host, the command including information for authentication requesting access to the secure storage area; a processor configured to generate a device authentication code based on the information for the authentication; and a memory interface configured to access the secure storage area under control of the processor, and the processor may perform at least a portion of an operation of the device authentication code while the host interface or the memory interface receives data, following the command.

Memory controller and storage device

A memory controller performs a self-test operation on a memory device in response to a diagnostic command received from a host. The controller includes a host interface that receives the diagnostic command and a processor that executes the self-test and generates a corresponding response. The response transmitted to the host includes a basic header segment used in standard protocol communication and an extra header segment that carries result information indicating the outcome of the self-test. This structure enables efficient diagnostic communication between the host and the memory controller without disrupting regular memory operations.

Memory controller, storage device, and operating method of storage device

According to an embodiment of the present technology, a storage device may include a memory device including a secure storage area for storing therein data to be accessed according to authentication; an access mode memory configured to store therein information of device access mode regarding an operation mode for the secure storage area; and a memory controller configured to receive a command regarding the secure storage area from an external host and process the command according to whether information of host access mode included in the command matches the information of the device access mode.

Storage device, computing system, and method for accessing to secure storage area based on access mode

According to an embodiment of the present disclosure, a storage device may include a memory device, and a memory controller configured to receive a read command from an external host and control the memory device according to the read command, wherein the read command may include a basic header segment commonly included in commands transferred between the external host and the memory controller and including information indicating that the read command is a command for requesting data stored in the memory device, a transaction specific field including information indicating that the read command is a read command for at least two or more logical addresses, and an extra header segment including information on the at least two or more logical addresses.

Storage device and method of operating the same

A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.

Semiconductor package using a polymer substrate

A storage device includes: a non-volatile memory device; and a storage controller for receiving a first Protocol Information unit (PIU) including a first merge message from an external device, and performing, based on the first PIU, at least one of a sense operation of reading first data stored in a memory block of the non-volatile memory device and a select operation of storing, in the memory block, second data received from the external device. The first PIU includes a basic header segment commonly included in PIUs transmitted/received between the external device and the storage controller, and a first Extra Header Segment (EHS) including the first merge message.

Storage device including storage controller processing command in which separate commands are merged and operating method thereof

A storage device includes a nonvolatile memory device including a replay protected memory block; and a memory controller for, as a submission command requesting access to the replay protected memory block is received from an external host including a host memory having a plurality of Physical Region Pages (PRPs), acquiring a host replay protected memory block data frame stored in one of the plurality of PRPs included in the external host and accessing the replay protected memory block. The submission command may include information on a position at which the memory controller is to store a response to the submission command among the plurality of PRPs.

Storage device and operating method thereof

According to an embodiment of the present technology, a storage device may include a main memory device, a buffer memory device including a plurality of areas and operating as a buffer of the main memory device, and a memory controller configured to change one or more of respective uses of the plurality of areas in response to a preparation command indicating that one or more read commands for requesting data stored in the main memory device are to be provided, which is received from an external host.

Memory controller, storage device, and host device

A water pipe cleaning system using high-pressure nitrogen and a water pipe cleaning method using the same are provided. The water pipe cleaning system using high-pressure nitrogen includes: nitrogen pressure vessels containing high-pressure nitrogen therein; a main control unit gathering the high-pressure nitrogen from the nitrogen pressure vessels and controlling pressure of the high-pressure nitrogen; a feed piping device connected to an outlet of the main control unit and connected to an inlet of a pipe to be washed; and a discharge piping device connected to an outlet of the pipe and connected to a nitrogen discharging portion to discharge nitrogen discharged from the pipe to the outside. The main control unit is configured such that control modules are stacked on one another. Each of the control modules is configured such that the nitrogen pressure vessels are connected together in parallel, and has an individual outlet.

Water pipe cleaning system using high-pressure nitrogen and water pipe cleaning method using same

An electronic device includes a memory controller and a memory device. The memory controller that controls the memory device includes a write buffer to temporarily store write data received from a host, a write timing controller to receive temperature information indicating a temperature of the memory device and generate write timing information based on the temperature information, the write timing information indicating a write timing at which the write data is transferred to and stored in the memory device, and a write operation controller to control the write buffer and the memory device based on the write timing information such that the write data stored in the write buffer is transferred to and stored in the memory device.

Memory controller and method of operating the same

Provided herein may be a storage device and a method of operating the same. A memory controller may include a command processor configured to generate a flush command in response to a flush request and determine flush data chunks to be stored, a write operation controller configured to control memory devices to perform a first program operation of storing flush data chunks, and to perform a second program operation of storing data corresponding to a write request that is input later than the flush request, regardless of whether a response to the flush command has been provided to a host, and a flush response controller configured to, when the first program operation is completed, provide a response to the flush command to the host depending on whether responses to flush commands, input earlier than the flush command, have been provided to the host.

A memory controller, a memory system including the memory controller and a method for operating the memory system are disclosed. The memory controller updates a reference parameter for a memory area in which at least part of the mapping information is stored and determines whether to activate the memory area based on the reference parameter to effectively execute commands received from a host.

Growing community of inventors

Seoul, South Korea

Byung Jun Kim