Samsung Electronics Co., Ltd.

Byung-Chul Park

Seog-Heon Ham

Jin-Ho Seo

Byung-jo Kim

Tae-Sun Kim

She-Woong Jeong

Yang-Ho Kim

Won-Baek Lee

Soon-Koo Kweon

A method of binning pixels in an image sensor including: dividing a pixel array into a plurality of binning areas, wherein each binning area includes (2n)*(2n) pixels, wherein n is an integer equal to or greater than two; and generating binning pixel data in each of the binning areas, wherein the locations of the binning pixel data of each binning area are evenly distributed within the binning area.

Method of binning pixels in an image sensor and an image sensor for performing the same

A stereophonic image may be enhanced by splitting the left and right input audio signals into a plurality of left and right output signals in a plurality of audio frequency bands and then generating left and right output audio signals from the left and right output signals based on the magnitude of the differences between corresponding left and right output signals and also based upon the absolute magnitude of the left and right input audio signals themselves. In particular, a stereophonic image enhancement device according to the invention processes a left input signal and a right input signal using a first spectrum analyzer and a second spectrum analyzer which output a plurality of left output signals and right output signals corresponding to a plurality of frequency bands in response to the corresponding left input signal and right input signal. A table lookup signal is responsive to the plurality of left output signals and to the plurality of right output signals to output a plurality of left output signal pairs and a plurality of right output signal pairs. A first and second adder are responsive to the plurality of left output signal pairs and right output signal pairs respectively to add the output signal pairs and produce final left output signals and right output signals respectively.

Stereophonic image enhancement devices and methods using lookup tables

The present invention discloses a calculation method utilizing a circuit and a circuit for obtaining a logarithmic approximation value. The circuit minimizes the error in calculating a logarithmic approximation value by adding a simple circuit. The method includes the steps of obtaining a square value of an input data value, which is greater than or equal to 0 and less than 1. A subtracting step substracts the square value of the input data value from the input data value to obtain a first output result. The first output result is then divided by 4 to obtain a second output result. The input data value is then added to the second output result to obtaining a third output result.

Calculation method and circuit for obtaining a logarithmic approximation

Growing community of inventors

Yongin-si, South Korea

Byung-Chul Park