Samsung Electronics Co., Ltd.

Byoungkeun Son

Changhyun Lee

Hansoo Kim

Jinho Kim

Sung-Il Chang

Hyejin Cho

Kihyun Kim

Chanjin Park

Hyunjung Kim

Yoocheol Shin

Chung-Il Hyun

Sunil Shim

Jin-Soo Lim

Sukhun Choi

Youngwoo Park

Wonseok Cho

Jae-Joo Shim

Wonjun Lee

Jaehoon Jang

Kwang Soo Seol

Jinman Han

Kyunghyun Kim

Jaegoo Lee

Daehyun Jang

Ju-Young Lim

Jaehyoung Choi

ChangSup Mun

Byungkwan You

Youngsoo An

Mingu Kim

Sung-Min Hwang

Kyoung-Hoon Kim

Jae-Hoon Jang

Hoosung Cho

Sung-Hwan Jang

Sung-Ii Chang

Jong In Yun

Three-dimensional semiconductor devices are provided. The three-dimensional semiconductor device includes a substrate, a buffer layer on the substrate. The buffer layer includes a material having an etching selectivity relative to that of the substrate. A multi-layer stack including alternating insulation patterns and conductive patterns is provided on the buffer layer opposite the substrate. One or more active patterns respectively extend through the alternating insulation patterns and conductive patterns of the multi-layer stack and into the buffer layer. Related fabrication methods are also discussed.

Three dimensional semiconductor devices

A semiconductor device includes a substrate, a stack, and channel structures penetrating the stack. The stack includes gate electrodes and insulating layers alternately and repeatedly stacked on the substrate, and extending in a first direction. The channel structures in a first row are spaced apart from each other in the first direction. The stack includes a first sidewall that includes first recessed portions and first protruding portions. Each of first recessed portions is defined by an adjacent pair of the first recessed portions. Each of the first recessed portions has a shape recessed toward a first region of the stack between an adjacent pair of the channel structures of the first row. Each of the first recessed portions has a width that decreases in a direction toward the first region when measured along the first direction.

Semiconductor device including a stack having a sidewall with recessed and protruding portions

A three-dimensional semiconductor device includes an upper structure on a lower structure, the upper structure including conductive patterns, a semiconductor pattern connected to the lower structure through the upper structure, and an insulating spacer between the semiconductor pattern and the upper structure, a bottom surface of the insulating spacer being positioned at a vertical level equivalent to or higher than an uppermost surface of the lower structure.

Semiconductor devices

Three-dimensional (3D) nonvolatile memory devices include a substrate having a well region of second conductivity type (e.g., P-type) therein and a common source region of first conductivity type (e.g., N-type) on the well region. A recess extends partially (or completely) through the common source region. A vertical stack of nonvolatile memory cells on the substrate includes a vertical stack of spaced-apart gate electrodes and a vertical active region, which extends on sidewalls of the vertical stack of spaced-apart gate electrodes and on a sidewall of the recess. Gate dielectric layers extend between respective ones of the vertical stack of spaced-apart gate electrodes and the vertical active region. The gate dielectric layers may include a composite of a tunnel insulating layer, a charge storage layer, a relatively high bandgap barrier dielectric layer and a blocking insulating layer having a relatively high dielectric strength.

Three-dimensional semiconductor memory devices

Three-dimensional semiconductor devices

Provided are nonvolatile memory devices and methods of forming the same. The nonvolatile memory device includes a plurality of word lines, a ground select line, string select line, and a dummy word line. Each of distances between the dummy word line and the ground select line and between the dummy word line and the word line is greater than a distance between a pair of the word lines adjacent to each other.

Nonvolatile memory devices and methods forming the same

Provided are three-dimensional nonvolatile memory devices and methods of fabricating the same. The memory devices include semiconductor pillars penetrating interlayer insulating layers and conductive layers alternately stacked on a substrate and electrically connected to the substrate and floating gates selectively interposed between the semiconductor pillars and the conductive layers. The floating gates are formed in recesses in the conductive layers.

Three-dimensional nonvolatile memory devices including interposed floating gates

Growing community of inventors

Suwon-si, South Korea

Byoungkeun Son