Samsung Electronics Co., Ltd.

Hyundai Motor Company

Byoungho Kwon

Boun Yoon

Kuntack Lee

Jonghyuk Park

Yonghee Lee

Inho Kim

Inseak Hwang

Yanghee Lee

Hyesung Park

Jin-Woo Bae

Taemin Earmme

Kichul Park

Ki Hoon Jang

Seungchul Han

Hyosan Lee

Yongsun Ko

Sang Won Bae

Chungki Min

Sangkyun Kim

Ki-Woong Kim

Bo Yun Kim

Hongjin Kim

Miso Shin

Sol Han

Inkwon Kim

Sungoh Park

Myeongan Kwon

Youngbeom Pyon

Jisu Kim

Daeik Kim

Hyo-Jung Kim

Sung-Min Cho

Yungjun Kim

Hansol Seok

Youngin Kim

Kieun Seo

Yeongbong Park

Hyunjoon Park

Jung Seok Do

A manufacturing method of a semiconductor device includes: etching a substrate, thereby forming a cell trench and a dummy trench; forming a preliminary isolation structure on the substrate, wherein a first dummy recess is formed in the preliminary isolation structure and overlaps with the dummy trench; forming a lower mask layer on the preliminary isolation structure, wherein a second dummy recess is formed in the lower mask layer and overlaps with the first dummy recess; forming a dummy recess filling pattern filling the second dummy recess; forming an upper mask layer on the lower mask layer and the dummy recess filling pattern; forming a gate trench using the lower mask layer and the upper mask layer as a mask; and forming a gate structure in the gate trench.

Manufacturing method of semiconductor device including forming a recess filling pattern

A conditioner of a chemical mechanical polishing (CMP) apparatus includes a disk to polish a polishing pad of the CMP apparatus, a driver to rotate the disk, a lifter to lift the driver, an arm to rotate the lifter, and a connector to connect the driver to the lifter, the driver being tiltable with respect to the lifter.

Conditioner, chemical mechanical polishing apparatus including the same and method of manufacturing a semiconductor device using the apparatus

A substrate-cleaning apparatus may include a tilting arm to which a roll brush and a motor are coupled, a support arm positioned on the tilting arm, a first spring and a second spring coupling the tilting arm to the support arm, a first air bag and a second air bag mounted between the tilting arm and the support arm, and a controller configured to adjust an internal pressure of each of the first air bag and the second air bag. The controller may adjust a difference in internal pressure between the first air bag and the second air bag to control the inclination of the roll brush, and may adjust the internal pressure of each of the first air bag and the second air bag to move the roll brush vertically.

Substrate-cleaning apparatus having tiltable roll brush

A chemical mechanical polishing apparatus includes a fixing portion; and a rotary body module including a rotating shaft rotatably installed on the fixing portion, a first rotating unit connected to the rotating shaft and on which a wafer is mounted, and a second rotating unit disposed around the first rotating unit and on which a retainer ring is mounted, wherein the fixing portion comprises a first driving member disposed above the first rotating unit and a second driving member disposed above the second rotating unit, wherein the first and second driving members are comprised of a magnet or an electromagnet, wherein a first magnet, disposed opposite to the first driving member, is provided in the first rotating unit, and a second magnet, disposed opposite to the second driving member, is provided in the second rotating unit, and wherein the first rotating unit and the second rotating unit are independently tilted.

Rotary body module and chemical mechanical polishing apparatus having the same

A method of processing a substrate may include preparing the substrate, polishing the substrate, and cleaning the substrate using a double nozzle, which is configured to provide a spray and a chemical solution onto the substrate. The spray may include a deionized water, and the chemical solution may be diluted with the deionized water. The chemical solution and the spray may be spaced apart from each other by a distance of 7 cm to 12 cm.

Cleaning substrate method and method of processing substrate using the same

Provided are a three-dimensional semiconductor memory device and a method of fabricating the same. The device may include a substrate including a peripheral circuit region and a cell array region, peripheral gate stacks provided on the peripheral circuit region of the substrate, and an electrode structure provided on the cell array region of the substrate. The electrode structure may include a lower electrode, a lower insulating layer covering the lower electrode, and upper electrodes and upper insulating layers, which are vertically and alternately stacked on the lower insulating layer. The lower insulating layer may be extended from the cell array region to the peripheral circuit region to cover the peripheral gate stacks, and a top surface of the lower insulating layer may be higher on the peripheral circuit region than on the cell array region.

Three-dimensional semiconductor memory device

Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.

Semiconductor device and method of fabricating the same

A method of fabricating a semiconductor device includes providing a substrate including a pair of first regions and a second region therebetween, forming first patterns on the respective first regions to at least partially define a stepwise portion at the second region, and forming a dummy pattern that at least partially fills the stepwise portion. The dummy pattern may be an electrically floating structure. The dummy pattern may be formed as part of forming second patterns on the respective first regions, and the dummy pattern and the second patterns may include substantially common materials. Because the dummy pattern at least partially fills the stepwise portion at the second region, the material layer covering the second patterns and the dummy pattern may omit a corresponding stepwise portion.

Method of fabricating semiconductor device

A semiconductor device includes a substrate, a peripheral structure, a lower insulating layer, and a stack. The substrate includes a peripheral circuit region and a cell array region. The peripheral structure is on the peripheral circuit region. The lower insulating layer covers the peripheral circuit region and the cell array region and has a protruding portion protruding from a flat portion. The stack is on the lower insulating layer and the cell array region, and includes upper conductive patterns and insulating patterns which are alternately and repeatedly stacked.

Three-dimensional semiconductor memory device and method of fabricating the same

A semiconductor memory device may include a selection transistor on a semiconductor substrate, an interlayered insulating layer covering the selection transistor, a lower contact plug coupled to a drain region of the selection transistor and configured to penetrate the interlayered insulating layer, and a magnetic tunnel junction pattern coupled to the lower contact plug. The lower contact plug may include a metal pattern and a capping metal pattern in contact with a top surface of the metal pattern. The capping metal pattern may include a top surface having a surface roughness that is smaller than a surface roughness of the top surface of the metal pattern. The magnetic tunnel junction pattern may include bottom and top electrodes, a lower magnetic layer and an upper magnetic layer between the top and bottom electrodes, and a tunnel barrier layer between the lower magnetic layer and the upper magnetic layer.

Semiconductor memory devices

Growing community of inventors

Hwaseong-si, South Korea

Byoungho Kwon