Samsung Electronics Co., Ltd.

Byoungdeog Choi

Yoosang Hwang

Hyun-Woo Chung

Sangyeon Han

JungWoo Seo

Hongrae Kim

Hyukwoo Kwon

Seongmin Choo

Ha-Young Yi

Jangseop Kim

Dongwoo Kim

Dongyoung Kim

Eunkee Hong

Young-Min Ko

Jongmyeong Lee

Mansug Kang

Youn-seok Choi

Kyungmun Byun

Honggun Kim

A semiconductor device includes a substrate, a bottom electrode on the substrate, a first support layer on the substrate next to a sidewall of the bottom electrode, a dielectric layer covering the sidewall and a top surface of the bottom electrode, and a top electrode on the dielectric layer. The bottom electrode includes a first part having a plurality of protrusions that protrude from a sidewall of the first part. The first part of the bottom electrode may be on the first support layer.

Semiconductor device

A semiconductor device includes a pair of line patterns disposed on a substrate. A contact plug is disposed between the pair of line patterns and an air gap is disposed between the contact plug and the line patterns. A landing pad extends from a top end of the contact plug to cover a first part of the air gap and an insulating layer is disposed on a second part of the air gap, which is not covered by the landing pad.

Methods of manufacturing semiconductor devices

A method of fabricating a semiconductor may include forming on a substrate a mold structure including a mold layer, a buffer layer, and a support layer, performing on the mold structure an anisotropic etching process to form a plurality of through holes in the mold structure, and forming a plurality of bottom electrodes in the through holes. The buffer layer has a nitrogen content amount that increases as approaching the support layer from the mold layer. The buffer layer has an oxygen content amount that increases as approaching the mold layer from the support layer.

Semiconductor device and method of fabricating the same

An integrated circuit (IC) device includes a lower electrode including a main portion having a sidewall with at least one step portion, and a top portion having a width less than that of the main portion in a lateral direction. An upper support pattern contacts the top portion of the lower electrode. The upper support pattern includes a seam portion. To manufacture an IC device, a mold pattern and an upper sacrificial support pattern through which a plurality of holes pass are formed on a substrate. A plurality of lower electrodes are formed inside the plurality of holes. A peripheral space is formed on the mold pattern. An enlarged peripheral space is formed by reducing a width and a height of the top portion. An upper support pattern is formed to fill the enlarged peripheral space.

Integrated circuit device and method of manufacturing the same

An integrated circuit (IC) device includes a lower electrode formed on a substrate, and an upper support structure disposed around the lower electrode and supporting the lower electrode. The upper support structure includes an upper support pattern surrounding the lower electrode and extending in a lateral direction parallel to the substrate, the upper support pattern having a hole through which the lower electrode passes, and an upper spacer support pattern between the upper support pattern and the lower electrode inside the hole and having an outer sidewall in contact with the upper support pattern and an inner sidewall in contact with the lower electrode, wherein a width of the upper spacer support pattern in the lateral direction decreases in a direction toward the substrate. To manufacture an IC device, an upper support pattern is formed on a substrate. An upper spacer support film is formed to cover a sidewall and a top surface of the upper support pattern. A plurality of lower electrodes are formed inside a plurality of holes formed in the upper support pattern. Portions of the upper spacer support film are removed to form a plurality of upper spacer support patterns between the upper support pattern and the lower electrodes, respectively.

Integrated circuit device including support patterns and method of manufacturing the same

A semiconductor device includes bit line structures on a substrate, the bit line structures extending along a first direction and being spaced apart from each other along a second direction perpendicular to the first direction, contact plugs spaced apart from each other along the first direction and being on active regions of the substrate between adjacent bit line structures, a linear spacer on each longitudinal sidewall of a bit line structure, landing pads on the contact plugs, respectively, the landing pads being electrically connected to the contact plugs, respectively, and landing pads that are adjacent to each other along the first direction being offset with respect to each other along the second direction, as viewed in a top view, a conductive pad between each of the contact plugs and a corresponding active region, a vertical axes of the conductive pad and corresponding active region being horizontally offset.

Semiconductor devices and methods of manufacturing the same

Semiconductor devices having an air gap

A method for manufacturing a semiconductor device includes forming a storage node hole passing through an upper support layer, a bowing prevention layer and an upper mold layer using a dry etching process, forming a lower electrode in the storage node hole, patterning the upper support layer and the bowing prevention layer to expose a portion of the upper mold layer, removing the upper mold layer and at least a portion of the bowing prevention layer using a first wet etching process, and sequentially forming a dielectric layer and an upper electrode that cover the lower electrode. An etch rate of the bowing prevention layer may be substantially equal to an etch rate of the upper support layer during the dry etching process. An etch rate of the bowing prevention layer may be higher than an etch rate of the upper support layer during the first wet etching process.

Semiconductor device and method for manufacturing the same

A method of fabricating a semiconductor device includes providing a substrate including a first region and a second region, forming a first trench having a first width in the first region and a second trench having a second width in the second region, and the second width is greater than the first width. The method also includes forming a first insulation layer in the first and second trenches, removing the first insulation layer in the second trench to form a first insulation pattern that includes the first insulation layer remaining in the first trench, forming on the substrate a second insulation layer that fills the second trench, and the second insulation layer includes a different material from the first insulation layer.

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Suwon-si, South Korea

Byoungdeog Choi