Samsung Electronics Co., Ltd.

Byeongchan Kim

Solji Song

Hyunsu Hwang

Un-Byoung Kang

Jongho Lee

Ju-Il Choi

Junyoung Park

Chungsun Lee

Unbyoung Kang

Jumyong Park

Gyuho Kang

Jeonggi Jin

Dongjoon Oh

Juil Choi

Jinho An

A semiconductor package includes: a first semiconductor chip including a first semiconductor substrate including a first active surface and a first inactive surface opposite to each other and a plurality of first chip pads on the first active surface; a second semiconductor chip including a second semiconductor substrate including a second active surface and a second inactive surface opposite to each other and a plurality of second chip pads on the second active surface, the second active surface being stacked on the first semiconductor chip to face the first inactive surface; a bonding insulation material layer interposed between the first semiconductor chip and the second semiconductor chip; and a plurality of bonding pads surrounded by the bonding insulation material layer to electrically connect the first semiconductor chip to the second semiconductor chip.

Semiconductor package and method of manufacturing the same

A semiconductor package includes a first semiconductor chip having a first substrate, a first insulating layer on the first substrate, and a plurality of first bonding pads on the first insulating layer, and having a flat upper surface by an upper surface of the first insulating layer and upper surfaces of the plurality of first bonding pads; and a second semiconductor chip on the upper surface of the first semiconductor chip and having a second substrate, a second insulating layer below the second substrate and in contact with the first insulating layer, and a plurality of second bonding pads on the second insulating layer and in contact with the first bonding pads, respectively, wherein the first insulating layer includes an insulating interfacial layer in contact with the second insulating layer, embedded in the first insulating layer, and spaced apart from the plurality of first bonding pads.

Semiconductor device, semiconductor package and method of manufacturing the same

A semiconductor package including a redistribution substrate including an insulating layer and redistribution patterns in the insulating layer may be provided. Each of the redistribution patterns may include a via portion, a pad portion vertically overlapping the via portion, and a line portion extending from the pad portion. The via portion, the pad portion, and the line portion may be connected to each other to form a single object. A level of a bottom surface of the pad portion may be lower than a level of a bottom surface of the line portion. A width of the line portion may have a largest value at a level between a top surface of the line portion and the bottom surface of the line portion.

Semiconductor package

A semiconductor package includes an interposer having a first surface and a second surface opposite to the first surface and including a plurality of bonding pads, and first and second semiconductor devices on the interposer. Each of the plurality of bonding pads includes a first pad pattern provided to be exposed from the first surface and having a first width and a second pad pattern provided on the first pad pattern and having a second width greater than the first width.

Semiconductor package and method of manufacturing the semiconductor package

Growing community of inventors

Asan-si, South Korea

Byeongchan Kim