Samsung Electronics Co., Ltd.

Korea Electronics Co., Ltd.

Byeong-Hoon Lee

Seung-Won Lee

Sun-kwon Kim

Il-Jong Song

Ki-Hong Kim

Seung-Keun Lee

Byeong-Taek Moon

Yo-Han Jang

Young-Ki Lee

Sun-Kwon Kim

Young-Ho Lim

Chil-Hee Chung

Hwi-taek Chung

Min-Koo Han

Jun-Ho Kim

Jong-Pil Cho

Jae-Suk Lee

Sang-Hyo Lee

Hyoung-Hwan Roh

Chul-joon Choi

Yearn-Ik Choi

Chol-Su Yoon

Hyuck-Jun Cho

Moo-Sup Lim

Won-Oh Lee

Jung-Eon Park

A near field communication (NFC) package in a portable device and method thereof are provided. The NFC package includes a secure storage device configured to store data, and an NFC controller configured to receive data from the secure storage device, provide the received data to a first external terminal by performing an NFC communication in an NFC mode, and provide the received data to a second external terminal by performing a magnetic secure transmission (MST) communication in an MST mode.

Near field communication package and portable device including the same

A cover of a mobile device includes a metal structure disposed to cover one surface of the mobile device. The metal structure includes a metal material, and operates as an antenna for a wireless communication of the mobile device.

Cover of a mobile device and mobile device including the same

A method of operating a near field communication (NFC) device includes receiving, by the NFC device, a first signal from an NFC reader, transmitting, by the NFC device, a response to the first signal to the NFC reader and changing selectively, by the NFC device, a radio frequency (RF) configuration parameter associated with signal transmission operation during a signal transmission interval, based on determining whether the NFC reader recognizes the response.

Method of operating near field communication (NFC) device and NFC device

A wearable electronic device according to example embodiments includes a display panel configured to display an image, a main board including a processor configured to control an operation of the wearable electronic device, a metal frame defining a perimeter of the wearable electronic device, the metal frame including a metal material, the metal frame having first and second terminals, the first terminal being adjacent to the second terminal with a slit therebetween, a loop antenna between the display panel and the main board, the loop antenna configured to connect to the first and second terminals of the metal frame, and a near field communication (NFC) chip configured to connect to the metal frame and the loop antenna, the NFC chip configured to perform a near field communication by transmitting or receiving an NFC signal using the metal frame and the loop antenna.

Near field communication chip embedded in a wearable electronic device and wearable electronic device

A housing of a mobile device including a frame defining a perimeter of the mobile device, the frame including a first metal material and configured to operate as a first antenna for a first wireless communication, and a cover configured to cover one surface of the mobile device, the cover including a second metal material, and the cover and at least a portion of the frame configured to operate as a second antenna for a second wireless communication may be provided.

Housing of a mobile device, near field communication transceiver and mobile device

A near field communication (NFC) device includes a resonance unit and an NFC chip. The resonance unit emits an electromagnetic wave to communicate data with an external NFC card in a reader mode. The NFC chip estimates a distance between the resonance unit and the external NFC card based on an antenna voltage generated by the resonance unit while the resonance unit emits the electromagnetic wave, and adjusts a magnitude of the electromagnetic wave based on the estimated distance.

Near field communication device, electronic system having the same and method of controlling power in near field communication device

Provided are a Radio Frequency IDentification (RFID) tag with a signal reception method. The RFID tag includes a demodulator that receives a read signal containing read data. The demodulator includes; a voltage generating circuit that provides a first voltage signal and a second voltage signal derived from the received read signal, an inverter that provides a data pulse signal indicative of the read data by inverting the second voltage signal using an inverting voltage defined in relation to the first voltage signal, and a buffer that recovers the read data by buffering the data pulse signal.

RFID tag and method receiving RFID tag signal

A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.

Flash memory system capable of operating in a random access mode

A semiconductor integrated circuit including a detector and a secure checker. The detector generates a detection signal upon sensing an abnormal state in an operating environment of the semiconductor integrated circuit. The secure checker generates a check signal to find an operating condition of the detector and receives the detection signal. The detector activates the detection signal in response to the check signal.

Semiconductor integrated circuit and testing method thereof

Flash memory system operating in a random access mode

Example embodiments provide a method and apparatus of correcting error data due to charge loss within a non-volatile memory device including a plurality of memory cells. The method of correcting error data within the non-volatile memory devices may include detecting error data in a second data group by comparing a first data group read from memory cells in response to a first voltage with the second data group read from memory cells in response to a second voltage. The second voltage is higher than the first voltage. Error data in the first data group is detected by error-correcting code (ECC). Re-writing data in the memory cells is performed by correcting error data in the first data group and error data in the second data group. A central processing unit (CPU) may detect error in the second data group. The second data group may be read through a page buffer and compared with the first data group stored in a SRAM. The detected error may be updated to the page buffer. Error data in the first data group may be updated to the page buffer. The CPU corrects error in the final error data, and the page buffer rewrites the corrected data in the plurality of memory cells.

Method and apparatus of correcting error data caused by charge loss within non-volatile memory device

An integrated circuit card includes a central processing unit, a memory and an abnormal condition detector. The memory stores data to be processed by the central processing unit. The abnormal condition detector detects whether at least one operating condition of the integrated circuit card is within one of a suspend region or a reset region. The abnormal condition detector controls an operation of the central processing unit in accordance with the detection.

Integrated circuit card with condition detector

A memory card includes: a first memory chip responding to all commands input externally; and a second memory chip responding to commands, among the commands input externally, relevant to reading, programming, and erasing operations with data. Card identification information stored in the first memory chip includes capacity information corresponding to a sum of sizes of the first and second memory chips. The plurality of memory chips of the memory card are useful in designing the memory card with storage capacity in various forms.

Memory card and memory system having the same

Flash memory system capable of operating in a random access mode and data reading method thereof

A method for programming a flash memory device with a plurality of memory cells. A selected memory cell is programmed under a condition where a bulk area is biased with a high voltage. A program pass/fail of the memory cell is verified with the high voltage applied to the bulk area.

Growing community of inventors

Seoul, South Korea

Byeong-Hoon Lee