Samsung Electro-mechanics Co., Ltd.

Samsung Electronics Co., Ltd.

Korea Advanced Institute of Science and Technology

Other

Byeong Hak Jo

Jeong Hoon Kim

Hyun Paek

Jong Ok Ha

Yoo Sam Na

Tah Joon Park

Yong Il Kwon

Moon Suk Jeong

Yoo Hwan Kim

Hyeon Seok Hwang

Young Wong Jang

Hyun Suk Lee

Youn Suk Kim

Shinichi Iizuka

Hyun Hwan Yoo

Sol Kim

Kyung Pyo Hong

Jong Mo Lim

Gyu Suck Kim

Song Cheol Hong

Seung Min Oh

Moon Sun Kim

Ki Yong Son

Bon Hoon Koo

Kyoung Seok Park

Kyu Jin Choi

Seung Won Seo

Moon Young Jeong

Yong Ii Kwon

Min Sun Kim

The present invention relates to a cement additive and a method for producing same, wherein carcinogens, including heavy metals such as hexavalent chromium and the like, generated from cement are removed while maintaining the strength and characteristic physical properties of cement. Moreover, the cement additive according to the present invention can provide cement that does not become oxidized by heat into hexavalent chromium.

Cement additive and method for producing same

A bias timing control circuit includes a current source, a bias switch circuit, a duty cycle sensing circuit, and a switching control circuit. The bias switch circuit includes a first path switch, connected between an output node of the current source and a bias amplifying circuit, and a second path switch, connected between the output node of the current source and a temperature compensation circuit. The duty cycle sensing circuit is configured to generate a timing control signal based on a duty cycle of a transmission enable signal. The switching control circuit is configured to control a first turn-on time of the first path switch during an initial startup period, and a second turn-on time of the second path switch during a normal driving period subsequent to the initial startup period to adjust a warm-up time of a power amplifying circuit based on the timing control signal.

Amplifying device with bias timing control circuit based on duty cycle

A radio frequency switching device includes: a first series switching circuit connected between a first terminal and a second terminal; a first shunt switching circuit connected between one end of the first series switching circuit and a ground; a voltage generation circuit configured to generate a first gate voltage to be output to the first series switching circuit, to generate a second gate voltage to be output to the first shunt switching circuit, and to generate a bias voltage higher than the second gate voltage to control the first shunt switching circuit to enter an off state; a first resistance circuit connected between a signal line between the first terminal and the second terminal, and a bias voltage terminal of the voltage generation circuit; and a second resistance circuit connected between the bias voltage terminal of the voltage generation circuit and a ground terminal of the first shunt switching circuit.

Leakage current reduction type radio frequency switch device

An amplifying apparatus is provided. The amplifying apparatus comprises an amplifying circuit comprising a power amplifier and a bias circuit, the bias circuit is configured to detect an ambient temperature of the power amplifier to output a temperature voltage and regulate an internal current based on an input control signal to supply a bias current obtained by the regulation to the power amplifier; and a temperature control circuit that generates the control signal based on the temperature voltage during initial driving from a transmission mode starting point in time to an input point in time at which an input signal is input and outputting the control signal to the amplifying circuit.

Amplifying apparatus with improved linearity

A power amplifier device includes a bias circuit to generate a startup current, which is based on an internal voltage and a startup voltage, during a startup time prior to a steady driving time point, and to generate a bias current, which is based on the internal voltage, after the steady driving time point, and a startup circuit to supply the bias circuit with the startup voltage during the startup time.

Power amplifier device with improved response speed

A radio-frequency switch includes a first series switch including a plurality of series field-effect transistors (FETs) connected in series between a first terminal and a second terminal, a first shunt switch including a plurality of shunt FETs connected in series between the first terminal and a first ground terminal, and a first shunt gate resistor circuit including a plurality of gate resistors respectively connected to gates of the plurality of shunt FETs of the first shunt switch. Respective resistance values of the plurality of gate resistors of the first shunt gate resistor circuit successively increase in a direction away from the first ground terminal toward the first terminal.

Radio-frequency switch with voltage equalization

A bias circuit includes a current source to generate a reference current, a temperature compensation portion in an off-state in an initial start period in response to a first control signal, and in an on-state in a normal driving period, subsequent to the initial start period, and to receive a first current of the reference current, and a bias output portion to generate a warm up current based on the reference current in the initial start period and to generate a bias current based on a second current, which is lower than the reference current by an amount of the first current, in the normal driving period.

Bias circuit and power amplifier for improving linearity

A radio frequency switch includes a control buffer circuit to generate a first gate voltage and a first body voltage; and a switching circuit to switch at least one signal path in response to the first gate voltage and the first body voltage. The control buffer circuit includes an off voltage detection circuit to detect whether the off voltage is a negative voltage or a ground voltage and output a voltage detection signal, a first gate buffer circuit to output a first gate voltage having a voltage level based on the voltage detection signal and the band selection signal, and a first body buffer circuit to output a first body voltage having a voltage level based on the voltage detection signal, the band selection signal, and the mode signal.

Control buffer circuit and radio frequency switch device

A negative voltage generation circuit includes a clock generation circuit configured to generate a first clock signal, a first voltage control circuit configured to vary a first resistance value based on a magnitude of a power supply voltage and further configured to control a magnitude of a voltage in a first charge node, based on the varied first resistance value, and a first charge pump circuit configured to charge a voltage, controlled by the first voltage control circuit, in a charge mode, based on the first clock signal, and further configured to output a first voltage, generated by the charging, as a first negative voltage.

Negative voltage generation circuit without low-dropout regulator

A power amplifier apparatus, includes an envelope tracking (ET) current bias circuit configured to generate a first ET bias current by calculating a direct current DC, based on a reference voltage, and an ET current, based on an ET voltage, according to an envelope of an input signal; and a power amplifier circuit having a bipolar junction transistor supplied with the first ET bias current and a power voltage to amplify the input signal, wherein an average current of the first ET bias current is controlled to be substantially constant.

Adaptive multiband power amplifier apparatus

A negative voltage circuit includes a first charge pump circuit and a second charge pump circuit. The first charge pump circuit is configured to operate in a start-up mode and perform a first charge pumping operation based on a first current to generate a negative voltage. The second charge pump circuit is configured to operate in a normal operating mode subsequent to the start-up mode and perform a second charge pumping operation based on a second current to generate a negative voltage, The first current is higher than the second current, and a speed of the first charge pumping operation is higher than a speed of the second charge pumping operation.

Negative voltage circuit based on charge pump

A radio frequency switching circuit includes a switching circuit comprising a plurality of switching transistors connected between a first terminal and a second terminal, a gate resistor circuit comprising a plurality of gate resistors, each of the plurality of gate resistors having a first node connected to a respective gate of each of the plurality of switching transistors, and a gate buffer circuit comprising a plurality of gate buffers, each of the plurality of gate buffers being connected to a respective second node of each of the plurality of gate resistors, wherein each of the plurality the gate buffers is configured to provide a first gate signal to the gate of each of the plurality of switching transistors through each of the plurality of gate resistors.

Radio frequency switching circuit and apparatus with reduced switching response delay

A negative voltage circuit comprises an inverter circuit that performs a charging operation and a discharging operation, a first dual current circuit supplying a first current for a charging operation of the inverter circuit based on a start-up mode, and a second current for the charging operation of the inverter circuit based on a normal operating mode, a second dual current circuit supplying a third current for a discharging operation of the inverter circuit based on the start-up mode, and a fourth current for the discharging operation of the inverter circuit based on the normal operating mode, a load switching circuit that connects an output node of the inverter circuit to one of an output terminal of a negative voltage circuit and the second operating voltage terminal, and a load capacitor circuit connected between the output terminal and a ground to stabilize a negative voltage at the output terminal.

Negative voltage circuit

An envelope tracking (ET) bias circuit includes a detection circuit configured to select an ET operation voltage input through a first input terminal of the detection circuit, or an envelope signal detected from a radio frequency (RF) signal input through a second input terminal of the detection circuit, in response to a first control signal, to and output he selected one of the ET operation voltage and the envelope signal as a detection signal; an amplification circuit configured to amplify the detection signal, and output the amplified detection signal; and a bias output circuit configured to generate an ET bias current based on the amplified signal, and output the generated ET bias current.

Envelope tracking bias circuit and power amplifying device

A radio frequency switching device includes a switching circuit including first and second transistors; a gate resistor circuit including a first gate resistor and a second gate resistor, the first gate resistor connected to a gate of the first transistor and the second gate resistor connected to a gate of the second transistor; a gate buffer circuit including a first gate buffer and a second gate buffer, the first gate buffer being connected to the first gate resistor to provide a first gate signal to the first transistor through the first gate resistor, the second gate buffer being connected to the second gate resistor to provide a second gate signal to the second transistor through the second gate resistor; and a delay circuit to generate the first gate signal having a first switching time and the second gate signal having a second switching time different than the first switching time.

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Suwon-si, South Korea

Byeong Hak Jo