U.S. Philips Corporation

Nxp B.v.

Koninklijke Philips Corporation N.V.

Motorola Corporation

Burkhard Dick

Edgar Herbert Callaway, Jr

James G Mittel

Andreas H Wichern

Winfried B Jansen

Vance H Peterson

Knud Holtvoeth

Dieter J Janta

Manfred Biehl

Andreas Hans Walter Wichern

Wilfried E Knop

Peter Wiese

Norbert Wirges

Bernd Pille

A differential crystal oscillator circuit is disclosed. The differential crystal oscillator circuit includes an output port. The output port includes a first terminal and a second terminal. A resonance port is included to couple a resonance element to the differential crystal oscillator circuit. The differential crystal oscillator includes a current source. A differential amplifier is included to excite the resonance element. The differential amplifier is coupled to the current source and the resonance port. The differential amplifier includes a plurality of transistors. The differential crystal oscillator circuit further includes a low pass filter that in combination with a transistor in the differential amplifier exhibits characteristics of a high pass filter. The differential amplifier is configured to use the current source as an active load.

Differential crystal oscillator

The invention relates to a circuit arrangement () of a low-noise linear input amplifier comprising a parallel circuit of a common-base circuit () and a common-emitter circuit (), the emitters of two first transistors (Q, Q) are interlinked and the bases of two second transistors (Q, Q) are intercoupled, the collectors are interconnected in parallel with the output, and the source voltage (VG) is interlinked with the emitters of the second transistors (Q, Q) and with the bases of the first transistors (Q, Q), in which a linearization of the output current (OUTLNA) as a function of the source voltage (VG) is achieved by a linearization of the transfer function, such as the tangential hyperbolic function, of the first and second transistors (Q, Q, Q, Q).

Amplifier circuit

Circuit arrangement for shifting the phase of an input signal, which circuit arrangement consists of two branches whose two output signals are 90&#xb0; phase-shifted, and use of this phase shifter in a circuit arrangement for suppressing the mirror frequency. The filter systems in the two branches of the phase shifter are implemented in such a way that the phase difference between these two branches is 90&#xb0;, independent of the frequency of the input signal. In the mirror frequency circuit, a frequency band is amplified or blanked during transmission. The base frequency BF constitutes the center of the frequency band. The amplitude difference is small in the solutions according to the invention. The amplitude difference is improved when the two 90&#xb0; phase-shifted signals are matched or substantially equalized as regards their amplitude. The matching is performed in that the two signals are rectified and subsequently subtracted from each other. The result is supplied to an integrator whose output signal, together with a reference signal, constitutes the control value. This results in a substantially ideal suppression of the mirror frequency. The circuit arrangement can be used in a radio or television receiver.

Circuit arrangement for shifting the phase of an input signal and circuit arrangement for suppressing the mirror frequency

The invention relates to an anti-demodulator circuit which is fundamentally built up in the same way as a demodulator circuit but, instead of a bandpass filter as generally used in a demodulator, comprises a notch filter which receives an input signal comprising a useful signal and an interference signal, and generates a filtered signal. The notch filter has a center frequency which approximately corresponds to the frequency of the input signal so as to suppress at least a part of the useful signal. The anti-demodulator circuit further comprises a mixer circuit which receives the filtered signal and a phase-shifted input signal and supplies a demodulated output signal which substantially corresponds to the interference signal. The invention can be particularly used in connection with a filtering device for suppressing interference signals based on adjacent channel disturbances in FM radios, in which the bandwidth of the filtering device is controlled in dependence upon the output signal of the anti-demodulator circuit.

Anti-demodulator circuit, filtering device and demodulator circuit

A current mirror arrangement including an input current path comprising a main current path of a first current mirror transistor and a transistor connected thereto in a cascode configuration and referred to as first cascode transistor, an output current path comprising a main current path of a second current mirror transistor and a transistor connected thereto in a cascode configuration and referred to as second cascode transistor, the current mirror transistors being interconnected in a current mirror configuration and their control terminals being connected to a first circuit point, the connected control terminals of the cascode transistors being interconnected and being connected to an input terminal in the input current path of the current mirror arrangement, the input terminal being constituted by a terminal of the main current path of the first cascode transistor, and an output terminal being constituted by a terminal of the main current path of the second cascode transistor, and a current splitting circuit for deriving a part of a current from the first circuit point in the output terminal, the current splitting circuit is adapted to split up the current from the first circuit point directly to the output terminal and a reference point.

Current mirror arrangement

A rectifier circuit is described, which comprises an arrangement of a first, a second and a third transistor, emitters of said transistors being coupled together at a first junction point and to a terminal of a first constant current source and in which arrangement collectors of the first and the second transistor are coupled together at a second junction point, a current mirror arrangement having a predetermined mirror ratio, an input of said current mirror being coupled to the second junction point and an output of said current mirror being coupled to a collector of the third transistor at a third junction point, wherein an input voltage, by which the collector-emitter currents of the first and/or the second transistor are controllable, can be supplied to the rectifier circuit bia bases of the first and/or the second transistor, while an output voltage can be taken from the base of the third transistor of the rectifier circuit and the output voltage at least substantially corresponds to the rectified input voltage, and the first, the second and the third transistor have predetermined emitter regions. To provide a rectifier circuit of a simple structure, ensuring an at least substantially linear signal processing also in the range of its working point, the rectifier circuit according to the invention comprises a complementary current stage, which is controllable by the output voltage and supplies at least a complementary current to the input and/or output of the current mirror arrangement, said complementary current corresponding for all values of the output voltage at least substantially to the lower value of the collector-emitter currents of the first and the second transistor.

Rectifier circuit

A differential amplifier includes a first amplifier transistor whose base terminal is coupled to an emitter terminal of a first emitter-follower transistor, a second amplifier transistor whose base terminal is coupled to an emitter terminal of a second emitter-follower transistor, a first emitter impedance across which the emitter terminals of the first and second amplifier transistors are coupled to each other, while base terminals of the emitter-follower transistors can be supplied with a differential voltage for controlling the differential amplifier. In order to enable stable operation and also a characteristic curve that is linear over rather large dynamic ranges, such a differential amplifier according to the invention includes a power transfer circuit by which a first current is supplied to the emitter terminal of the first emitter-follower transistor in a voltage-decoupled manner, which first current has such a predefined proportion to a collector current in a collector terminal of the second amplifier transistor due to the configuration of the first emitter-follower transistor and of the second amplifier transistor that a base-emitter voltage occurring on the first emitter-follower transistor substantially corresponds to a base-emitter voltage occurring on the second amplifier transistor. The power transfer circuit similarly applies a second current to the emitter terminal of the second emitter-follower transistor in a voltage-decoupled manner.

Differential amplifier

A transistor amplifier is described having a first transistor pair, which comprises a first and a second transistor, and having a second transistor pair, which comprises a third and a fourth transistor, in which the transistors of each pair have their emitter electrodes coupled to each other and to an associated constant current source, the first transistor has its base electrode and its collector electrode coupled to the corresponding electrodes of the third transistor, and the second transistor has its base electrode and its collector electrode coupled to the corresponding electrodes of the fourth transistor, the base electrodes of the first and the third transistor, on the one hand, and the base electrodes of the second and the fourth transistor, on the other hand, being arranged to receive an input signal and an output signal being derivable from the collector electrodes of the transistors, and having a first, a second, a third and a fourth negative-feedback circuit each included in the coupling to the associated constant current source. In an amplifier of this type a high linearity and a low noise level are to be obtained with a circuit of low complexity. In accordance with the invention this is basically achieved in that the first and the fourth negative-feedback circuit each comprise a series arrangement of a plurality of n diode elements and the second and the third negative-feedback circuit each comprise a series arrangement of a plurality of n&minus;1 diode elements, the last-mentioned arrangements being each connected to an input branch of a current mirror circuit. These current mirror circuits comprise output branches whose currents are fed at least partly, as a result of which their noise components do not affect the output signals of the transistor amplifier.

Transistor amplifier

A circuit arrangement includes a first differential amplifier stage with two amplifier members whose main current paths are coupled to one another and, via a first reference current source, to a first reference potential, and are coupled to a respective output terminal as well as, via a respective output impedance, to a second reference potential, and whose control terminals can be supplied with a first control signal, an output signal being available at the output terminals. At least one further differential amplifier stage is provided, each of which includes two further amplifier members whose main current paths are coupled to one another and, via a respective further reference current source, to the first reference potential and whose control terminals can be supplied with (a) further control signal(s). Linearization of the transfer characteristic of the circuit arrangement can be achieved while avoiding a loss of gain in that the output impedances are preferably constructed as identical voltage dividers provided with a respective tapping for each further differential amplifier stage, the main current paths of the further differential amplifier stages are connected to each time two pair-wise mutually symmetrical tappings, providing a predetermined division, of the two voltage dividers, the ratio of the instantaneous values of the control signals to one another is predetermined, and the division of the tappings of the voltage dividers and the ratio of the currents supplied by the reference current sources are adjusted to one another in such a manner that output signal components which exhibit a dependency on at least one higher power of the control signals cancel out. This circuit arrangement also offers an improved noise factor.

Circuit arrangement including a differential amplifier stage

Circuit arrangement for producing a D.C. current

A radio receiver comprising signal receiving means(10), means(12) for adjusting the amplitude of a signal received by said signal receiving means, a signal transmission system(32) coupled to said means for adjusting the signal amplitude, an agc feedback loop(38,42,40) coupled between an output of the signal transmission system and a control input of the signal amplitude adjusting means, the agc feedback loop comprising means for producing a multiple switched agc signal.

Radio receivers

Operational amplifier having two differential amplifiers

A description is given of a circuit arrangement comprising

Circuit arrangement with a filter quadripole

A circuit arrangement having a logarithmic transfer function between an input signal and an output signal in a predefined level range of the input signal circuit which has a very low power consumption and low circuit complexity, includes a first pair of amplifier elements, namely transistors, forming a first differential amplifier and a second pair of amplifier elements, namely transistors, forming a second differential amplifier. The first pair of transistors have their emitters connected to each other and to a first current source, their collectors connected to working impedances subdivided by respective taps, and their bases receive the input signal between them. The second pair of transistors have their emitters connected to each other and to a second current source, their collectors connected to the collectors of the first pair of transistors, respectively, and their bases cross-connected to the taps of the working impedances. A rectifier stage has inputs connected to the collectors of the first and second pairs of transistors and an output at which the output signal is formed.

Circuit arrangement comprising a logarithmic transfer function

A receiver (100) for receiving an input signal and generating an output signal therefrom has a switchable gain circuit (104) with a stepwise variable gain control (118), a local oscillator (106) and an automatic gain control (AGC) detector (114) with a response for detecting a level of the output signal and generating an AGC signal indicative of the level of the output signal and a state machine (116) being responsive to the AGC signal generating a control signal at the stepwise variable gain control to increase or decrease a gain of the switchable gain circuit in discrete stepwise steps.

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Hamburg, Germany

Burkhard Dick