Infineon Technologies Ag

Kabushiki Kaisha Toshiba

Other

Bum-ki Moon

Koji Yamakawa

Keitaro Imai

Nicolas Nagel

Osamu Arisumi

Andreas Hilliger

Hiroshi Itokawa

Yoshinori Kumura

Gerhard Beitel

Takamichi Tsuchiya

Tohru Ozaki

Katsuaki Natori

Kazuhiro Tomioka

Rainer Bruchhaus

Ulrich Egger

Moto Yabuki

Karl Hornik

Haoran Zhuang

A semiconductor device according to an aspect of the invention includes a semiconductor substrate, and a capacitor that is provided above the semiconductor substrate and is configured such that a dielectric film is sandwiched between a lower electrode and an upper electrode, the dielectric film being formed of an ABOperovskite-type oxide that includes at least one of Pb, Ba and Sr as an A-site element and at least one of Zr, Ti, Ta, Nb, Mg, W, Fe and Co as a B-site element, wherein a radius of curvature of a sidewall of the capacitor, when viewed from above or in a film thickness direction, is 250 [nm] or less, and a length of an arc with the radius of curvature is {250 [nm]&#xd7;&#x3c0;/6 [rad]} or less.

Semiconductor device and mask pattern

A semiconductor device comprises a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode and made of a perovskite type ferroelectrics containing Pb, Zr, Ti and O, the dielectric film comprising a first portion formed of a plurality of crystal grains partitioned by grain boundaries having a plurality of directions.

Semiconductor device and method of manufacturing the same

In a process for fabricating a ferrocapacitor comprising providing ferroelectric PZT elements over an AlOlayer, the AlOlayer is covered with a seed layer comprising layers of PZT and TiO. Then a thicker layer of PZT is formed over the seed layer and crystallized. By this process, the crystallinity of the thick PZT layer is much improved, and its orientation is improved to be in the (111) direction. Furthermore, the seed layer reduces downward diffraction of Pb from the thick PZT layer, such as through the AlOinto a TEOS structure beneath.

Process for fabrication of a ferrocapacitor

Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film.

Semiconductor device

Semiconductor device comprising a capacitor using a ferroelectric material

There is disclosed a semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate and comprising a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, at least one of the bottom electrode and the top electrode comprising a conductive film selected from a noble metal film and a noble metal oxide film, a metal oxide film having a perovskite structure, provided between the dielectric film and the conductive film, represented by ABO, and containing a first metal element as a B site element, and a metal film provided between the conductive film and the metal oxide film, and containing a second metal element which is a B site element of a metal oxide having a perovskite structure, a decrease of Gibbs free energy at a time when the second metal element forms an oxide being larger than that at a time when the first metal element forms an oxide.

Semiconductor device with perovskite capacitor

A capacitor with improved reliability is disclosed. The capacitor includes a bottom electrode, a top electrode, and an intermediate layer therebetween. A contact, which is electrically coupled to the top electrode, is provided. At least a portion of the contact is offset from the capacitor. By offsetting the contact from the top electrode, the etch damage to the top electrode is reduced, thereby reducing or eliminating the need for the anneal to repair the etch damage.

Memory cells with improved reliability

A capacitor over plug (COP) structure is disclosed. The COP avoids the step which is created in conventional COP structures, which adversely impacts the properties of the capacitor. In one embodiment, the step is avoided by providing a plug having upper and lower portions. The upper portion, which is coupled to the bottom electrode of the capacitor, has substantially the same surface area as the bottom electrode. A barrier layer can be provided between the plug and bottom electrode to avoid oxidation of the plug material.

Capacitor over plug structure

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Poughkeepsie, NY, United States of America

Bum-ki Moon