Samsung Electronics Co., Ltd.

Buil Jung

Hyunmog Park

Wonsok Lee

Jeongsoon Kang

A memory device includes a memory cell array including a plurality of memory cells, a sub word line driver block including a plurality of sub word line drivers configured to output word line signals, which are respectively provided to the plurality of memory cells, and a row decoder configured to generate word line enable signals, which are respectively provided to the plurality of memory cells. Each of the memory cells includes a cell transistor including dual gates, and a capacitor connected to the cell transistor. A word line enable signal applied by the row decoder is connected to one of the dual gates.

Memory device

An image sensor includes a substrate having a pixel area in which a plurality of active areas is defined. A first transistor includes a first gate electrode including a buried gate portion. The buried gate portion is buried in the substrate in a first active area selected from the plurality of active areas. A second transistor includes a second gate electrode overlapping the buried gate portion on the first active area in a vertical direction.

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Hwaseong-si, South Korea

Buil Jung