Advanced Micro Devices Corporation

Spansion Llc.

Bryon K Hance

William S Brennan

Allen Lewis Evans

Joseph William Wiseman

Brian D White

Terri A Couteau

Laura Pressley

Daniel E Sutton

Michael J Satterfield

David Hendrix

Travis D Kirsch

Carroll W Webb

Devices and systems for insulating integrated circuits from ultraviolet ('UV') light are described. The device includes a conductive feature, a first and second UV blocking layer, a first and second insulating laver, and a conductive structure. The first insulating layer overlays the first UV blocking layer. A via opening extends through the first insulating layer and the first UV blocking layer. The second UV blocking layer overlays the first insulating laver. The second insulating layer overlays the second UV blocking layer. An interconnect trench is defined in the second insulating layer and second UV blocking layer. The conductive structure is electrically connected to the conductive feature and extends into the via opening and along the interconnect trench.

Electronic devices with ultraviolet blocking layers

A process of forming an electronic device including forming a first ultraviolet ('UV') blocking layer over a conductive feature, wherein the first UV blocking layer lies within 90 nm of the conductive structure; forming a first insulating layer over the first UV blocking layer; and patterning the first insulating layer and the first UV blocking layer to form a first opening extending to the conductive feature, wherein during the process, the first UV blocking layer is exposed to UV radiation.

Method of forming an electronic device

Methods and apparatus for inspecting a feature on a wafer surface are provided. In one aspect a method of inspecting a feature on a film surface is provided that includes illuminating the feature with laser radiation and detecting radiation scattered from the feature with a plurality of detectors. Each of the plurality of detectors has a known position. A position of the feature observed by each of the plurality detectors is computed based upon the radiation scattered from the feature. An average position of the positions observed by each of the plurality of detectors is computed. A first value for each of the plurality of detectors is computed that is the scalar product of the known position of a given detector with the difference of the position of the feature observed by that given detector and the average of the positions observed by each of the plurality of detectors. A second value or scatter height descriptor indicative of the topography of the feature is computed by summing first values for the plurality of detectors.

Method and apparatus for inspecting wafer defects

Various methods and apparatus are provided for testing an ion implantation tool. In one aspect, a method of testing an ion implanter is provided that includes forming a mask with a preselected pattern on a substrate. An ion implant is performed on the mask with the ion implanter. Following the ion implant, a scan of the mask is performed to identify any defects thereon. Defects appearing on the mask following the implant are indicative of latent mechanisms at work within the implanter. Ion implanter induced defects may be economically analyzed.

Method and apparatus for detecting ion implant induced defects

A method and system for use in wafer fabrication quality control. The method and system make quantitative a qualitative integrated circuit wafer defect signature. In response to the quantitativize wafer fabrication defect signature, the method and system identify at least one cause of the defect signature.

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Austin, TX, United States of America

Bryon K Hance