Freescale Semiconductor,inc.

Bryan D Preble

James W Miller

Michael G Khazhinsky

Martin J Bayer

An integrated circuit () includes first and second power domains and a bank of input/output (I/O) cells () coupled to the first and second power domains. The bank of I/O cells () includes a first plurality of active clamps () for the first power domain and a second plurality of active clamps () for the second power domain wherein the first () and second () pluralities of active clamps overlap along the bank of I/O cells. According to one aspect each of the plurality of input/output cells () has a bonding pad () for receiving an output signal referenced to a respective first power domain, and at least one ESD protection element () for a respective second power domain. According to another aspect, each of the plurality of input/output cells () has a bonding pad () for receiving a respective output signal and at least one ESD protection element for each of a first power domain and a second power domain.

Growing community of inventors

Gilbert, AZ, United States of America

Bryan D Preble