Broadcom Corporation

Bryan Chase

Aki Shohara

Stephen Pope

Yuo Chen

A method for communication is disclosed and includes, in a single chip including a plurality of on-chip devices, acquiring, from at least one of the plurality of on-chip devices, power information for the at least one of the plurality of on-chip devices. The acquiring may be in response to a query signal received by the at least one of the plurality of on-chip devices. An output signal indicative of power status of the at least one of the plurality of on-chip devices may be generated from within the chip, based on the acquired power information. The acquired power information may be communicated to the off-chip device. The acquired power information may be wirelessly communicated to the off-chip device via an antenna or an infrared transmitter on the single chip. The acquired power information may be communicated to an off-chip device via a wired connection on the single chip.

Method and system for monitoring module power information in a communication device

Methods and systems for monitoring operating status of a device are provided. Aspects of the method may include receiving within a chip, a signal indicative of a power status of an on-chip device. An output signal indicative of the power status may be generated from within the chip, while the chip is operating. The generated output signal may be communicated outside the chip via a serial bus, a plurality of pin connections on said chip, and/or a general purpose input/output connection. The generated output signal may be multiplexed on at least one pin on the chip and it may comprise a clock signal and/or a data signal. The data signal may comprise sequential power status information for a plurality of on-chip devices.

Method and system for monitoring module power status in a communication device

A method for monitoring operating status of a device includes receiving within a chip, a plurality of signals, each of the plurality of signals being indicative of a power status of a respective one of a plurality of on-chip devices. The method may also include generating from within the chip, a corresponding plurality of output signals. Each of the corresponding plurality of output signals respectively being indicative of the power status of the respective one of the plurality of on-chip devices. Each of the corresponding plurality of output signals may include a clock signal and a data signal. The corresponding plurality of output signals that are indicative of the power status may be output from the chip in a round robin manner. Each of the output signals that are indicative of the power status may be measured in real time by one or more resistor drops within the chip.

System and method for communication are disclosed and may include, in a single chip that includes one or more on-chip devices, where the one or more on-chip devices are enabled to receive wireless signals and transmit wireless signals, receiving at a first of the one or more on-chip devices, a wireless signal that queries power information for the first of the one or more on-chip devices. The power information for the first of the one or more on-chip devices may be acquired and communicated to an off-chip device. The acquired power information may be wirelessly communicated to the off-chip device via an antenna and/or an infrared transmitter on the single chip. The acquired power information may also be communicated to an off-chip device via a wired connection on the single chip and/or via a general purpose input/output (GPIO) connection on the single chip.

Methods and systems for monitoring operating status of a device are provided. Aspects of the method may include receiving within a chip, a signal indicative of a power information of an on-chip device. An output signal indicative of the power information may be generated from within the chip, while the chip is operating. The generated output signal may be communicated outside the chip via a serial bus, a plurality of pin connections on said chip, and/or a general purpose input/output connection. The generated output signal may be multiplexed on at least one pin on the chip and it may comprise a clock signal and/or a data signal. The data signal may comprise sequential power information for a plurality of on-chip devices.

An improved method and apparatus for Viterbi Algorithm calculations for maximum likelihood sequence estimators in communication receivers is disclosed. The calculations for the maximum likelihood sequence estimator, in accordance with the invention, utilizes a variant of the Viterbi algorithm developed by Ungerboeck in which the associated branch metric calculations for the trellis require the computation of a set of branch metric parameters. An embodiment of the present invention provides for an improved recursive method and apparatus for calculation of the branch metric parameters that reduces the number of processor clock cycles required per state metric calculation. This enables real time computation of the branch metric parameters during execution of the Viterbi Algorithm.

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Sunnyvale, CA, United States of America

Bryan Chase