International Business Machines Corporation

Bruno Roberto Aimi

John Edward Cronin

James Marc Leas

Anthony M Palagonia

Bernadette Ann Pierson

Dennis A Schmidt

Patricia McGuinnes Marmillion

Andre Conrad Forcier

Ferdinand D DiMaria

Hamid R Torabi

Ralph F Antonucci

A multichip semiconductor structure and fabrication method having connect assemblies with fuses which facilitate burn-in stressing and electrical testing of the structure are presented. The structure comprises a multichip stack having standard transfer wire outs to an edge surface thereof. At least some wire outs to the edge surface have fuses electrically series connected thereto such that should an excessive current source/sink arise during burn-in stressing, the corresponding fuse will open circuit. A conductive structure is also disclosed that facilitates the formation of final, operational metallization wiring on the edge surface of the multichip structure prior to burn-in stressing and testing. This conductive structure includes a first conductive level and a second conductive level. The first conductive level has isolated conductors with ends disposed in close proximity. The second conductive level includes islands of strap conductors that electrically interconnect the isolated conductors of the first conductive level. The first conductive level and a second conductive level are constructed of different conductive material which may be separately etched so that the second conductive level may be removed without affecting this first conductive level.

Fabrication, testing and repair of multichip semiconductor structures

An apparatus for conducting burn-in tests of circuit chips in which frangible connections are made between contact points of a reusable carrier and a chip to be tested. At the end of the burn-in test, shear force is imparted such that the frangible connections are broken without causing damage to the chip or the carrier. The carrier has at least one lead line or pad made of solder wettable material such as copper for making electrical connections with solder balls of the chip. The lead line is covered with an overlay which is made of non-wettable material to which solder will not adhere. Holes are provided in the overlay such that a restricted connection may be made between the solder balls and the underlaying lead line when the solder is reflowed. At the end of the test, linear shear force is imparted such that the connections between the solder balls and the lead line are broken. The solder balls are then reflowed to reshape them for subsequent use.

Connections between circuit chips and a temporary carrier for use in

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Williston, VT, United States of America

Bruno Roberto Aimi