International Business Machines Corporation

Bruce Ralph Petz

Mark Robert Funk

Lynn Allen McMahon

Andrew Dale Walls

Charles Luther Johnson

Timothy John Mullins

Joseph James Cahill

Steven D Lewis

Vi Chau

Harold Eugene Frye

Richard P Rieger

Harold E Frye

A system for stopping the operation of a data processing system executing control words stored in a read/write control word storage device. A special control word is stored at the control storage address where it is desired to stop operation of the processor and the regular control word at that address is stored in a service processor memory. When the control storage address containing the special control word is reached, the special control word causes the system clock to be inhibited, thereby stopping the execution of control words, an indication that the processor has been stopped is generated, and the regular control word is restored to the control word storage device from the service processor memory for resumption of system operation.

Control store address stop

A microcode branch, to one of a number of possible control words (sixteen control words are described), is based upon (1) the remaining operand length that is to be processed by a left to right instruction, and (2) by the byte alignment of the portion of the operand that currently resides in main storage interface registers. As a left to right instruction is being executed, the operand's new length and its new alignment, as they both will exist after a control word is executed, are determined. The new length and the new alignment are used to determine the addess of the next control word. A 16-way branch instruction has branch legs that are determined by the number of operand bytes that are left to be processed, and by the alignment of two operands in two storage registers that interface with main storage. This method and arrangement for microcode branching maximizes the amount of data that can be processed per processor cycle by the hardware upon execution of a left to right instruction.

Microcode branch based upon operand length and alignment

An integrated semiconductor VLSI chip design that increases the number of driver circuits, or groups of driver circuits, that can be simultaneously switched. Timed driver gating signals, or driver enable signals, are used, in conjunction with physical grouping of driver circuits on the chip, to isolate switching drivers from quiet drivers. This construction and arrangement minimizes detrimental effects usually caused by noise that is generated when driver circuits switch.

Noise control in an integrated circuit chip

A variable number of parity bits or error correction code per word is used to increase error detection for words having the extra parity bits in a control store. Since some words do not utilize all the architected space available for words, extra parity bits are generated at development time for such words and stored with the words. A decoder identifies the location and number of parity bits. Parity checking against the extra parity bits is then performed on different groups of bits in the word. This provides an inexpensive means of increasing error detection with minimal hardware cost.

Error detection using variable field parity checking

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Rochester, MN, United States of America

Bruce Ralph Petz