Stmicroelectronics (Research & Development) Limited

Stmicroelectronics (Crolles 2) Sas

Stmicroelectronics (Grenoble 2) Sas

Stmicroelectronics (Rousset) Sas

Stmicroelectronics Gmbh

Bruce Rae

Mohammed Al-Rawhani

Neale Dutton

Stuart McLeod

John Kevin Moore

Pascal Mellot

Raul Andres Bianchi

Sara Pellegrini

Francois Guyader

Marc A Drader

Mathieu Pierre Lisart

Marios Barlas

Bastien Mamdy

Isobel Nicholson

Alexandre Lopez

Graeme Storm

Flavien Hirigoyen

Duncan Hall

Sarrah Moiz Patanwala

Matteo Maria Vignetti

Elsa Lacombe

Ivan Ivanov

Elisa Lacombe

Gaelle Palmigiani

An array of single photon avalanche diodes (SPADs) includes a plurality of pixels. Each pixel includes a SPAD having a cathode connected to a first intermediate node and an anode coupled to first negative voltage, a quench circuit connected between the first intermediate node and the low voltage supply node, an AC coupling element connected between the first intermediate node and a second intermediate node, a filter component connected between the high voltage node and the second intermediate node, and an inverter having its input connected to the second intermediate node and its output providing an output signal. A resistance associated with the quench circuit, a capacitance associated with the SPAD, a capacitance associated with the AC coupling element, and a resistance associated with the filter component form a variable second order filter.

High count rate passive quenching SPAD

Disclosed herein is a single photon avalanche diode (SPAD) pixel for use in time-of-flight imaging. This pixel includes a SPAD having a cathode connected to a first node and an anode coupled to first negative voltage. A transistor circuit in the pixel includes a quench transistor connected between a supply voltage node and a second node, the quench transistor controlled by a quench control signal to operate in a high-impedance mode, and a recharge transistor connected in parallel with the quench transistor between the supply voltage node and the second node, the recharge transistor controlled by a feedback signal. The pixel also includes a readout inverter generating an output signal based upon a voltage at the first node and an adjustable delay circuit generating the feedback signal based upon the output signal, the feedback signal being delayed with respect to the output signal.

Active recharge quenching circuit for negative bias SPAD

The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.

Pixel with an improved quantum efficiency having a micro-lens and a diffractive structure

An electronic device includes a stack of a first level having a SPAD, a second level having a quench circuit for said SPAD, and a third level having a circuit for processing data generated by said SPAD. A method for making the device includes: a) forming of the first level; b) bonding, on the first level, by molecular bonding, of a stack of layers including a semiconductor layer; and c) forming the quench circuit of the second level in the semiconductor layer.

SPAD pixel

Disclosed herein is an array of pixels. Each pixel includes a single photon avalanche diode (SPAD) and a transistor circuit. The transistor circuit includes a clamp transistor configured to clamp an anode voltage of the SPAD to be no more than a threshold clamped anode voltage, and a quenching element in series with the clamp transistor and configured to quench the anode voltage of the SPAD when the SPAD is struck by an incoming photon. Readout circuitry is coupled to receive the clamped anode voltage from the transistor circuit and to generate a pixel output therefrom, the threshold clamped anode voltage being below a maximum voltage rating of transistors forming the readout circuitry.

Anode sensing circuit for single photon avalanche diodes

Pixel with an improved quantum efficiency

In some embodiments, a ToF sensor includes an illumination source module, a transmitter lens module, a receiver lens module, and an integrated circuit that includes a ToF imaging array. The ToF imaging array includes a plurality of SPADs and a plurality of ToF channels coupled to the plurality of SPADs. In a first mode, the ToF imaging array is configured to select a first group of SPADs corresponding to a first FoV. In a second mode, the ToF imaging array is configured to select a second group of SPADs corresponding to a second FoV different than the first FoV.

Multiple fields of view time of flight sensor

A combining network for an array of SPAD devices includes: synchronous sampling circuits, wherein each synchronous sampling circuit is coupled to an output of a corresponding SPAD device and is configured to generate a pulse or an edge each time an event is detected; and a summation circuit coupled to an output of each of the synchronous sampling circuits and configured to count a number of pulses or edges to generate a binary output value.

Circuit and method for combining SPAD outputs

A single photon avalanche diode (SPAD) has a cathode coupled to a high voltage supply and an anode coupled to a first node. A photodetection circuit includes: a first n-channel transistor having a drain coupled to the first node, a source coupled to ground, and a gate coupled to a third node; a second n-channel transistor having a drain coupled to the first node, a source coupled to ground, and a gate coupled to a second node; and an inverter having an input coupled to the first node and an output coupled to an intermediate node. A current starved inverter has an input coupled to the intermediate node and an output coupled to the second node, a logic gate has inputs coupled to the intermediate node and the second node, and an output coupled to the third node.

Extended hold-off time for SPAD quench assistance

An electronic integrated circuit chip includes a semiconductor substrate with a front side and a back side. A first reflective shield is positioned adjacent the front side of the semiconductor substrate and a second reflective shield is positioned adjacent the back side of the semiconductor substrate. Photons are emitted by a photon source to pass through the semiconductor substrate and bounce off the first and second reflective shields to reach a photon detector at the front side of the semiconductor substrate. The detected photons are processed in order to determine whether to issue an alert indicating the existence of an attack on the electronic integrated circuit chip.

Protected electronic integrated circuit chip

A pixel includes a single photon avalanche diode (SPAD) having a cathode coupled to a high voltage supply through a quenching element, with the SPAD having a capacitance at its anode formed from a deep trench isolation, with the quenching element having a sufficiently high resistance such that the capacitance is not fully charged when the SPAD is struck by an incoming photon. The pixel includes a clamp transistor configured to be controlled by a voltage clamp control signal to clamp voltage at an anode of the SPAD when the SPAD is struck by an incoming photon to be no more than a threshold clamped anode voltage, and readout circuitry coupled to receive the clamped anode voltage from the clamp transistor and to generate a pixel output therefrom. The threshold clamped anode voltage is below a maximum operating voltage rating of transistors forming the readout circuitry.

The present disclosure relates to a device that includes a photodiode having a first terminal that is coupled by a resistor to a first rail configured to receive a high supply potential and a second terminal that is coupled by a switch to a second rail configured to receive a reference potential. A read circuit is configured to provide a pulse when the photodiode enters into avalanche, and a control circuit is configured to control an opening of the switch in response to a beginning of the pulse and to control a closing of the switch in response to an end of the pulse.

Quenching of a SPAD

A photodetection circuit includes a single photon avalanche diode (SPAD) having a cathode coupled to a high voltage supply through a quench resistance and an anode coupled to a first node, a capacitive deep trench isolation capacitor coupled between the first node and ground, and a first n-channel transistor. The first n-channel transistor has a drain coupled to the first node, a source coupled to ground, and a gate coupled to a resistance control signal. A second n-channel transistor has a drain coupled to the first node, a source coupled to ground, and a gate coupled to a second node. An inverter has an input coupled to the first node and an output coupled to an intermediate node. A current starved inverter has an input coupled to the intermediate node and an output coupled to the second node.

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Edinburgh, United Kingdom

Bruce Rae