Apple Inc.

Tesla, Inc.

Brijesh Tripathi

Peter F Holland

Timothy John Millet

Joshua P De Cesare

Shane J Keil

Erik P Machnicki

Jung Wook Cho

Guy Cote

Manu Gulati

Gilbert H Herbeck

Anand Dalal

Adnan Esmail

Craig M Okruhlica

Nitin Bhargava

Paolo Sacchetto

Marc Albrecht

Christopher P Tann

Chaohao Wang

Jean-Pierre Simon Guillou

Sandro Hermann Pintz

Arthur L Spence

David S Zalatimo

Hao Nan

Prashant Joshi

Christopher Philip Alan Tann

Sundar Balasubramaniam

Moon Jung Kim

Jeffrey J Terlizzi

Colin Whitby-Strevens

Sukalpa Biswas

Scott Peter Krueger

Roberto G Yepez

Anup K Sharma

James Hollabaugh

Evgene Fainstain

Geertjan Joordens

In Jae Chung

Kiran Kattel

Albert C Kuo

Shing Horng Choo

Gaurav Chandra

Timofey Uvarov

Lakshya Jain

Ian C Hendry

Joseph P Bratt

Mahesh B Chappalli

Robert E Jeter

Michael J Smith

David Hayward

Josh P De Cesare

Rakesh L Notani

Kenneth I Greenebaum

Kai Lun Hsiung

Ilie Garbacea

Ian R Ollmann

Fabien S Faure

Derek Fujio Iwamoto

Raman S Thiara

Venkata Ramana Malladi

Neeraj Parik

Malcolm D Gray

Shiva Kumar

Chaitanya Polapragada

Allen Kim

Michael F Culbert

Mitchell David Adler

Michael G Frank

Martin Paul Grunthaner

Gurjeet S Saund

Vaughn Todd Arnold

Wolfgang Roethig

Eric G Smith

Bo Yang

Manu Agarwal

Terry L Tikalsky

Hari Ganesh R Thirunageswaram

Vijay M Bettada

Khaled M Alashmouny

David A Hartley

Steven T Peltier

Lukas Josef Pankau

Wenlong Wei

Axel B Schumacher

Dinesh M Shedge

Ian Ollman

Kenneth Greemebaum

James M Hollabaugh

Nitin Bhargawa

In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.

System on a chip with always-on processor

A method of communication in a vehicle network is provided. An example method includes transmitting a network allocation map in a TDMA cycle, indicating reservation of time slots in the TDMA cycle. The method further includes transmitting a synchronization signal in the TDMA cycle, to synchronize the timing of nodes in the vehicle network. Each of the reserved time slots is identified by at least a network ID of a transmitting node in the vehicle network, and a slot type comprising one of a low latency traffic slot, and a bulk traffic slot. Further, the low latency traffic slots are repeated in the TDMA cycle at least as frequently as a guaranteed QoS latency parameter. Further, the bulk traffic slots are at least as long as a guaranteed QoS throughput parameter.

Vehicle network and method of communication

An image captured using a sensor on a vehicle is received and decomposed into a plurality of component images. Each component image of the plurality of component images is provided as a different input to a different layer of a plurality of layers of an artificial neural network to determine a result. The result of the artificial neural network is used to at least in part autonomously operate the vehicle.

Data pipeline and deep learning system for autonomous driving

In an embodiment, a system on a chip (SOC) includes a component that remains powered when a central processing unit (CPU) processor and a memory controller of the SOC are powered off. The component may include a sensor capture unit to capture audio samples from an audio detector circuit and write them to a memory of the component. A processor of the component may be configured to search the audio samples for a predetermined pattern during a time when the CPU processor and the memory controller are powered down. In some embodiments, based on the audio samples filling to a threshold level in the memory of the component and a lack of detection of the predetermined pattern, the component is configured to wake up the memory controller and a path to the memory controller in order to write the audio sample to a memory controlled by the memory controller.

System on a chip with always-on component with powered-down configurations to process audio samples

A wiring system for an automobile connecting a processor and a plurality of devices, using one or more backbone sections. The processor and devices are connected to one another to form a first loop and a second loop, such that data may be transmitted along the first loop and data may be transmitted along the second loop.

High-speed-wiring-system architecture

Systems, apparatuses, and methods for implementing a timestamp based display update mechanism. A display control unit includes a timestamp queue for storing timestamps, wherein each timestamp indicates when a corresponding frame configuration set should be fetched from memory. At pre-defined intervals, the display control unit may compare the timestamp of the topmost entry of the timestamp queue to a global timer value. If the timestamp is earlier than the global timer value, the display control unit may pop the timestamp entry and fetch the frame next configuration set from memory. The display control unit may then apply the updates of the frame configuration set to its pixel processing elements. After applying the updates, the display control unit may fetch and process the source pixel data and then drive the pixels of the next frame to the display.

Timestamp based display update mechanism

An electronic device may be provided with a display. The display may be a variable frame rate display capable of adaptively adjusting a frame rate at which display frames are displayed in response to information associated with the current state of operation of the device. The information may be gathered using control circuitry in the electronic device. The control circuitry may gather the information for adjusting the frame rate by monitoring the electronic device power supply configuration, other device components, the type of content to be displayed, and user-input signals. The control circuitry may adjust the frame rate based on the gathered information by increasing or decreasing the frame rate. The control circuitry may be formed as a portion of display control circuitry for the device such as a display driver integrated circuit or may be formed as a portion of storage and processing circuitry external to the display.

Electronic devices with adaptive frame rate displays

An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.

Electronic device display with charge accumulation tracker

A method and system of aggregating and converting data in a vehicle network is provided. An example method includes receiving a plurality of streams of sensor data over two or more Camera Serial Interface (CSI). The method further includes rearranging the plurality of streams of sensor data into an aggregate stream. The method further includes packetizing the aggregate stream by arranging transmission format bits at appropriate bit positions of the aggregate stream to form a packet data stream. The method further includes transmitting the packet data stream over a vehicle on-board packet data link.

Method and system for aggregating and converting sensor data streams

Growing community of inventors

Los Altos, CA, United States of America

Brijesh Tripathi