Motorola Corporation

Bridgette A Bergami

Phillip H Williams

Louis C Parrillo

Stephen J Cosentino

Howard K Leung

Bich Y Nguyen

Dielectric filled isolation walls for semiconductor devices and integrated circuits of improved characteristics and ease of manufacture are formed by etching trenches in a semiconductor substrate and refilling the trenches with multiple layers of silicon oxy-nitride. Alternative oxygen rich and nitrogen rich oxy-nitride layers are used. For the narrowest trenches two layers suffice. Where trenches of different widths are present the wider trenches receive multiple layer pairs. A cap layer of oxy-nitride is added to insure filling of any trench intersections. The oxy-nitride desirably has a composition Si.sub.x O.sub.y N.sub.z where x, y, and z are in the range 0.25-0.4, 0.27-0.6, and 0.0-0.35, respectively, for the oxygen rich material and where x, y, and z are in the range 0.34-0.43 m 0.0-0.35, and 0.28-0.6, respectively, for the nitrogen rich material, expressed in atomic fraction and x+y+z=1. Both compositions of oxy-nitride are formed in the same LPCVD reactor by changing the conditions during layer deposition.

Multilayer trench isolation process and structure

Dielectric filled isolation walls for semiconductor devices and integrated circuits of improved characteristics and ease of manufacture are formed by etching trenches in a semiconductor substrate and refilling the trenches with multiple layers of silicon oxy-nitride. Alternative oxygen rich and nitrogen rich oxy-nitride layers are used. For the narrowest trenches two layers suffice. Where trenches of different widths are present the wider trenches receive multiple layer pairs. A cap layer of oxy-nitride is added to insure filling of any trench intersections. The oxy-nitride desirably has a composition Si.sub.x O.sub.y N.sub.z where x, y, and z are in the range of 0.25-0.4, 0.27-0.6, and 0.0-0.35, respectively, for the oxygen rich material and where x, y, and z are in the range 0.35-0.43m 0.0-0.35, and 0.28-0.6, respectively, for the nitrogen rich material, expressed in atomic fraction and x+y+z=1. Both compositions of oxy-nitride are formed in the same LPCVD reactor by changing the conditions during layer deposition.

An isolation formation process that minimizes bird's beak encroachment and preserves gate oxide integrity in the active region. Future active areas are protected by a structure having a central protective material layer, such as a thermal oxide, surrounded by a ring of thermal nitride. The thermal nitride and central protective material are coated by active region protection masking covers. In one embodiment, the masking covers include sidewalls over the thermal nitride ring. In another embodiment, the central protective material layer is overetched beneath an undercut covering layer to provide an undercut filled by the sidewall. All of these features contribute to bird's beak encroachment prevention which may be narrowed to as little as 0.07 microns per side.

Isolation formation process with active area protection

A process is disclosed for fabricating complementary insulated gate field effect transistors including doped field isolation regions and optional punch through protection. In one embodiment of invention, a silicon substrate is provided which has N-type and P-type surface regions. First and second masks are formed overlying active areas of the two surface regions. A third mask is then formed overlying the first region and the first mask. P-type impurities are implanted into the second region with an implant energy which is sufficient to penetrate through the second mask but insufficient to penetrate through the third mask. A second P-type implant is performed with an implant energy insufficient to penetrate through either mask. The first implant will aid in preventing punch through while the second implant dopes the field region. A fourth mask is then formed overlying the second region and the second mask. A first N-type implant is performed at energy sufficient to penetrate through the first mask but insufficient to penetrate through the fourth mask. This implant provides punch through protection for P channel transistors to be formed later. A second N-type impurity is implanted into the surface at an implant energy insufficient to penetrate through the first mask to provided field doping. The silicon substrate is then oxidized to form a field oxide at portions of the first and second surface regions which are not covered by the first and second masks.

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Gilbert, AZ, United States of America

Bridgette A Bergami