Infineon Technologies Ag

Wolfspeed, Inc.

Brian William Condie

Alexander Komposch

Soon Ing Chew

Sung Chul Joo

Benjamin P Law

Ulf Andre

Michael Real

Jae Hyung Jeremiah Park

Erwin Orejola

A packaged semiconductor device includes a first bond pad, a second bond pad, a first bond wire that includes a first end bonded to the first bond pad and a second end bonded to the second bond pad, and a second bond wire that includes a first end that is electrically connected to the first bond pad and a second end that is electrically connected to the second bond pad. The first end of the second bond wire is bonded to the first end of the first bond wire. A method of bonding a bond wire includes bonding a first end of a first bond wire to a contact surface of a first bond pad and bonding a first end of a second bond wire to a surface of the first end of the first bond wire.

Devices incorporating stacked bonds and methods of forming the same

A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.

High reliability semiconductor devices and methods of fabricating the same

A semiconductor package includes a substrate, an RF semiconductor die attached to a first side of the substrate, a capacitor attached to the first side of the substrate, and a first terminal on the first side of the substrate. The semiconductor package further includes copper or aluminum bonding wires or ribbons connecting the first terminal to an output of the RF semiconductor die, and gold bonding wires or ribbons connecting the capacitor to the output of the RF semiconductor die. The gold bonding wires or ribbons are designed to accommodate greater RF Joule heating during operation of the RF semiconductor die than the copper or aluminum bonding wires or ribbons. Corresponding methods of manufacturing are also described.

Hybrid semiconductor package

A semiconductor package includes a baseplate having a die attach region and a peripheral region, a transistor die having a first terminal and a second terminal facing away from the baseplate, and a frame including an electrically insulative member having a first side attached to the peripheral region of the baseplate, a second side facing away from the baseplate, a first metallization at the first side of the insulative member and a second metallization at the second side of the insulative member. The insulative member extends outward beyond a lateral sidewall of the baseplate. The first metallization is attached to the part of the first side which extends outward beyond the lateral sidewall of the baseplate. The first and second metallizations are electrically connected at a region of the insulative member spaced apart from the lateral sidewall of the baseplate.

Semiconductor package having a baseplate with a die attach region and a peripheral region

A semiconductor package includes a baseplate having a die attach region and a peripheral region, a transistor die having a first terminal attached to the die attach region, and a second terminal and a third terminal facing away from the baseplate, and a frame including an electrically insulative member having a first side attached to the peripheral region of the baseplate, a second side facing away from the baseplate, a first metallization at the first side of the insulative member and a second metallization at the second side of the insulative member. The insulative member extends outward beyond a lateral sidewall of the baseplate. The first metallization is attached to the part of the first side which extends outward beyond the lateral sidewall of the baseplate. The first and second metallizations are electrically connected at a region of the insulative member spaced apart from the lateral sidewall of the baseplate.

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Morgan Hill, CA, United States of America

Brian William Condie