Honeywell International Inc.

Brian R Bernier

Edwin David Cruzado

William John Dalzell, Jr

James L Tucker

Jason Waltuch

In one embodiment, a system comprises application-specific functionality, anti-tamper functionality to detect an unauthorized attempt to interact with the application-specific functionality; and a hardware key interface to communicatively couple the system to a hardware key. An attempt to interact with the application-specific functionality is considered unauthorized if an authorized hardware key is not communicatively coupled to the hardware key interface when the attempt occurs.

Hardware encryption key for use in anti-tamper system

In one embodiment, a system comprises JTAG functionality that implements at least a portion of a JTAG protocol. The JTAG functionality supports a test data in (TDI) line, a test data out (TDO) line, a test rest (TR) line, a test mode state (TMS) line, and a test clock (TCLK) line. The system further comprises a debug interface to communicatively couple the system to a debug device external to the system. The debug interface comprises a transmit (TX) line, receive (RX) line, and a clock (CLK) line. The system transmits data output by the JTAG functionality on the TDI input on the RX line of the debug interface and receives data from the debug device on the TX line of the debug interface and provides the received data to the JTAG functionality on the TDO line, TR line and the TMS line.

Encrypted JTAG interface

In one embodiment, a system comprises application-specific functionality, debug functionality, and a debug interface communicatively coupled to the debug functionality to communicatively couple the system to a debug device. The debug functionality encrypts data transmitted by the system over the debug interface.

Encrypted debug interface

A system to prevent unauthorized access to a protected device includes a test access port operable to mate with a test access connector, a security key port operable to mate with a security key and a security device in electrical communication with the test access port and the security key port. The protected device is in electrical communication with the test access port when the security device is enabled based on the security key. The test equipment is authorized for access to the protected device when the security device is enabled.

Securing standard test access port with an independent security key interface

In one embodiment, a system comprises debug functionality, a debug interface communicatively coupled to the debug functionality, and a hardware key interface. Communication with the debug functionality over the debug interface is not permitted if an authorized hardware key is not communicatively coupled to the hardware key interface.

Hardware key control of debug interface

A tamper response system to protect intellectual property is provided. In one embodiment, the tamper response system includes at least one sensor adapted to sense tamper activity and a tamper circuit. The tamper circuit is coupled to receive tamper signals from the at least one sensor. Moreover, the tamper circuit is adapted to clear at least one field programmable gate array (FPGA) upon receipt of a tamper signal.

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Tampa, FL, United States of America

Brian R Bernier