Oracle International Corporation

Graphcore Limited

Sun Microsystems, Inc.

Oracle America, Inc.

Brian Manula

Magne Vigulf Sandven

Haakon Ording Bugge

Daniel John Pelham Wilkinson

Bjorn Dag Johnsen

Ola Torudbakken

Arvind Srinivasan

Ola Tørudbakken

Morten Schanke

Harald Høeg

Harald Hoeg

Richard Luke Southwell Osborne

Hans Rygh

Ali Bozkaya

Robert W Wittosch

Knut Hallvard Tvete

Stephen Felix

Bjørn Dag Johnsen

Matthew David Fyles

Martin G Vickers

Mathias Hoddevik

Frederick Luther Gotwald

Benny Sum

Finn Egil Hoeyer Grimnes

Marius Gimle

Magne Sanduen

Hans Olaf Rygh

A data processing system having an address resolution function for deriving MAC addresses. The set of MACs defined for the devices on the network encode physical position or logical identifier information of those devices. Therefore, each of these MACs is derivable using a mapping function that maps the physical position or logical identifier information supplied by an application to the MAC addresses of the devices on the network. When the protocol processing entity has to send data over the network, it can obtain the MAC address for the destination determined on the basis of the physical position or logical identifier supplied by the application. In this way, since the MACs are derivable on the basis of the physical positions or logical identifiers, the broadcasting of ARP request messages, which would otherwise be required when the protocol processing entity requires the MAC for the destination, may be avoided.

Location based medium access control address

The same test data frame is dispatched from a network interface device a plurality of times so as to test a network. Since the same test data frame is used, it may be unnecessary for a new test data frame to be provided and protocol processed each time one is required to be sent. The protocol processing resources of the network interface device are then available for sending further traffic in parallel with the dispatch of the test data frames. On the receive side, the network interface device collects statistics regarding the reliable receipt of test frames, without requiring the test frames to be further processed and provided to a driver of the network interface device. In this way, the processing and buffering capacity in the network interface device is available for handling further traffic in parallel with the test traffic.

Network path testing via independent test traffic

One or more bits of the destination MAC address indicate a number of times a reset event has occurred. These bits may be referred to as a generation number. The generation number in a destination MAC address is updated when a reset event occurs. In this way, frames issued by the sender prior to the reset may be distinguished from frames issued after the reset, since the destination MAC addresses in those frames will not match. In this way, the recipient device is protected from stale packets.

Generation number for handling resets

System and method for using multiple global identification subnet prefix values in a network switch environment in a high performance computing environment. A packet is received from a network fabric by a first Host Channel Adapter (HCA). The packet has a header portion including a destination subnet prefix identifying a destination subnet of the network fabric. The network HCA is allowed to receive the first packet from a port of the network HCA by selectively determining a logical state of a flag and, selectively in accordance with a predetermined logical state of the flag, ignoring the destination subnet prefix identifying the destination subnet of the network fabric.

System and method for allowing multiple global identifier (GID) subnet prefix values concurrently for incoming packet processing in a high performance computing environment

A gateway in a computing system for interfacing a host with a subsystem for acting as a work accelerator to the host, the gateway having: an accelerator interface for enabling the transfer of batches of data to the subsystem at pre-compiled data exchange synchronisation points attained by the subsystem; a data connection interface for receiving data to be processed from storage; and a gateway interface for connection to a third gateway. The gateway is configured to store a number of credits indicating at least one of: the availability of data for transfer to the subsystem at a pre-compiled data exchange synchronisation point; and the availability of storage for receiving data from the subsystem at a pre-compiled data exchange synchronisation point. The gateway uses these credits to control whether or not synchronisation barrier is passed by transmitting synchronisation requests upstream to the third gateway or simply acknowledging the requests received.

Gateway to gateway synchronisation

A system comprising a gateway for interfacing external data sources with one or more accelerators. The gateway comprises a plurality of virtual gateways, each of which is configured to stream data from the external data sources to one or more associated accelerators. The plurality of virtual gateways are each configured to stream data from external data sources so that the data is received at an associated accelerator in response to a synchronisation point being obtained by a synchronisation zone. Each of the virtual gateways is assigned a virtual ID so that when data is received at the gateway, data can be delivered to the appropriate gateway.

Virtualised gateways

A gateway for use in a computing system to interface a host with the subsystem for acting as a work accelerator to the host, the gateway having: an accelerator interface for connection to the subsystem to enable transfer of batches of data between the subsystem and the gateway; a data connection interface for connection to external storage for exchanging data between the gateway and storage; a gateway interface for connection to at least one second gateway; a memory interface connected to a local memory associated with the gateway; and a streaming engine for controlling the streaming of batches of data into and out of the gateway in response to pre-compiled data exchange synchronisation points attained by the subsystem, wherein the streaming of batches of data are selectively via at least one of the accelerator interface, data connection interface, gateway interface and memory interface.

Data through gateway

A work accelerator is connected to a gateway. The gateway enables the transfer of data to the work accelerator from an external storage at pre-compiled data synchronisation points attained by the work accelerator. The work accelerator is configured to send to a register of the gateway an indication of a sync group comprising the gateway. The work accelerator then sends to the gateway, a synchronisation request for a synchronisation to be performed at an upcoming pre-compiled data exchange synchronisation point. The sync propagation circuits are each configured to receive at least one synchronisation request and propagate or acknowledge the synchronisation request in dependence upon the indication of the sync group received from the work accelerator.

Sync groupings

A computer system comprising: (i) a computer subsystem configured to act as a work accelerator, and (ii) a gateway connected to the computer subsystem, the gateway enabling the transfer of data to the computer subsystem from external storage at pre-compiled data exchange synchronization points attained by the computer subsystem, which act as a barrier between a compute phase and an exchange phase of the computer subsystem, wherein the computer subsystem is configured to pull data from a gateway transfer memory of the gateway in response to the pre-compiled data exchange synchronization point attained by the subsystem, wherein the gateway comprises at least one processor configured to perform at least one operation to pre-load at least some of the data from a first memory of the gateway to the gateway transfer memory in advance of the pre-compiled data exchange synchronization point attained by the subsystem.

Gateway pull model

A gateway for interfacing a host with a subsystem for acting as a work accelerator to the host. The gateway enables the transfer of batches of data to the subsystem at precompiled data exchange synchronisation points. The gateway acts to route data between accelerators which are connected in a scaled system of multiple gateways and accelerators using a global address space set up at compile time of an application to run on the computer system.

Gateway fabric ports

A computer system comprises a work accelerator, a gateway the transfer of data to the accelerator from external storage, the accelerator executes a first compiled code sequence to perform computations on data transferred to the accelerator from the gateway. The first compiled code sequence comprises a synchronisation instruction indicating a barrier between a compute phase in which the compute instructions are executed and an exchange phase, wherein execution of the synchronisation instruction causes an indication of a pre-compiled data exchange synchronisation point to be transferred to the gateway. The gateway comprises a streaming engine storing a second compiled code sequence in the form of a set of data transfer instructions executable by the streaming engine to perform data transfer operations to stream data through the gateway in the exchange phase, wherein the first and second compiled code sequences are generated as a related set at compile time.

Code compilation for scaling accelerators

A gateway implementing multiple independent sync networks. The independent sync networks can be used to allow for synchronisation between different synchronisation groups of accelerators. The independent sync networks allow synchronisations to be carried out asynchronously and simultaneously. The gateway has sync propagation circuitry that receives a first synchronisation request for an upcoming exchange phase and propagates this sync request through a first sync network. The first synchronisation request is a request for synchronisation between subsystems of a first synchronisation group. The sync propagation circuitry of the gateway also receives a second synchronisation request for a different exchange phase and propagates this sync request through the second sync network. The second synchronisation request is a request for synchronisation between subsystems of a second synchronisation group. The two exchange phases overlap in time. Therefore, the syncs are simultaneous and asynchronous.

Implicit sync group selection is performed by having dual interfaces to a gateway. A subsystem coupled to the gateway selects a sync group to be used for an upcoming exchange by selecting the interface to which a sync request is written to. The gateway propagates the sync requests and/or acknowledgments in dependence upon configuration settings for the sync group that is associated with the interface to which the sync request was written to.

Sync group selection

A gateway for interfacing a host with a subsystem for acting as a work accelerator to the host. The gateway enables the transfer of batches of data to the subsystem at precompiled data exchange synchronisation points. The gateway comprises a streaming engine having a data mover engine and a memory management engine, the data mover engine and memory management engine being configured to execute instructions in coordination from work descriptors. The memory management engine is configured to execute instructions from the work descriptor to transfer data between external storage and the local memory associated with the gateway. The data mover engine is configured to execute instructions from the work descriptor to transfer data between the local memory associated with the gateway and the subsystem.

Growing community of inventors

Oslo, Norway

Brian Manula