International Business Machines Corporation

Brian M McKevett

Tolga Ozguner

Paul Allen Ganfield

Mark David Bellows

James Francis Mikos

Kerry Christopher Imming

Gerald G Fagerness

A method is provided for address mapping in a network processor. The method includes the steps of (1) determining a port number of a port that receives a data cell; (2) determining a virtual path identifier and a virtual channel identifier for the data cell; and (3) creating a first index based on at least one of the port number, the virtual path identifier and the virtual channel identifier. The method further includes (1) accessing one of a plurality of entries stored in a first on-chip memory using the first index; (2) creating a second index based on the accessed entry of the first on-chip memory; and (3) accessing an entry of a second memory based on the second index. Numerous other aspects are provided.

Methods and apparatus for indexing memory of a network processor

Embodiments of the present invention optimize data bandwidth across an asynchronous buffer in a system with a variable clock domain. A move signal may be asserted to transfer data associated with a command into the asynchronous buffer. After the data has been moved into the buffer, an acknowledge signal may indicate that the transfer is complete. A launch signal may transfer the data in the asynchronous buffer to memory. Embodiments of the present invention allow the processing of a next command to begin at the earliest possible time while data associated with a previous command is being transferred into and out of the buffer, thereby increasing throughput and improving performance.

Optimizing data bandwidth across a variable asynchronous clock domain

In a first aspect, a first method is provided for adjusting memory system calibration. The first method includes the steps of (1) while in a first operating state, calibrating the memory system using a first amount of calibration data so that functional data may be read from and written to memory of the memory system; and (2) while in a second operating state, calibrating the memory system using a second amount of calibration data so that functional data may be read from and written to the memory, wherein the second amount of calibration data is smaller than the first amount of calibration data. Numerous other aspects are provided.

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Rochester, MN, United States of America

Brian M McKevett