Tektronix, Inc.

Scientific Imaging Technologies, Inc.

Brian L Corrie

Morley M Blouke

Denis L Heidtmann

Pauline Benn

Michael J McElevey

A semiconductor device, such as a back side illuminated CCD, is fabricated by forming an insulating layer over the front side of a body of semiconductor material, depositing a layer of high resistivity material over the front side of the insulating layer, patterning a portion of the layer of high resistivity material to form a long and narrow trace, and attaching a support member to the front side of the insulating layer. In the case of a back side illuminated CCD, the patterning of the layer of high resistivity material advantageously forms a long and narrow trace substantially confined to a peripheral area of the front side of the insulating layer and the semiconductor material is removed from the corresponding peripheral area of the back side of the insulating layer, leaving a plateau of semiconductor material that does not extend over the area that contains the long and narrow trace.

Method of processing a semiconductor device

A plate-like body (e.g., a silicon wafer) at least about 0.5 mm thick that is to be thinned is reinforced by applying to one main surface, in adhesive relationship thereto, a coating of a finely divided material which is fused to form a hard mechanically supportive coating. The body is thinned from the second main surface to a thickness less than about 250 .mu.m. For a silicon body, the mechanically supportive coating comprises at least about 18% silicon.

Method of thinning a silicon wafer using a reinforcing material

An integrated circuit is formed in a semiconductor die having a front face and a back face, the die having at least first and second functional regions. The first functional region comprises at least one zone of p-type material and at least one zone of n-type material that meets the zone of p-type material in a p-n junction. The integrated circuit comprises connection pads connected respectively to the zone of p-type material and the zone of n-type material, whereby those zones can be connected to an external circuit. At least one of the connection pads is electrically isolated from the second functional region of the integrated circuit. The integrated circuit is treated by mounting the die on a support member and removing material of the die so as to separate the functional regions of the die from each other.

Method of treating an integrated circuit to provide a temperature sensor

An integrated circuit formed in a semiconductor die which has at least two distinct functional regions is treated by mounting the die by way of its front face on a support member, and subsequently removing die material by way of its back face so as to physically separate the functional regions of the die from each other.

Method of treating an integrated circuit

A self aligned, nonoverlapping gate structure for a charge coupled device is fabricated by depositing three sets of interleaved polysilicon gate electrodes. The first set of electrodes is applied in a planar form and sized to a width of about one-third the spacing of the electrodes of the first set. The second and third sets of electrodes are applied to overlap, in turn, portions of the previously applied electrodes. A thick shield layer of SiO.sub.2 is deposited and patterned atop the first and second sets of gate electrodes. After deposition of the third set of electrodes, the shield layers are removed to provide passageways extending beneath the overlapping portions of the second and third sets of electrodes. Such overlapping portions are then removed by etching through the passageways, to produce a nonoverlapping, generally planar gate structure.

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Gaston, OR, United States of America

Brian L Corrie