Qnx Software Systems Gmbh & Co. Kg

Qnx Software Systems Limited

2236008 Ontario Limited

8758271 Canada Inc.

Thomas Fletcher

Brian Stecher

7801769 Canada Inc.

Sebastien Marineau-mes

Colin Burgess

Attilla Danko

Dan Dodge

Peter Van Der Veen

Sheridan Ethier

Randy Martin

Brian John Stecher

Peter H Van Der Veen

Dan T Dodge

Sebastien Marineau-Mes

Attila Danko

Kevin Goodman

Aleksandar Ristovski

Brian Edmond

Kaushik Thirukonda

Hao Zhou

Sunil Kittur

A thread of a client process may become blocked awaiting a reply to a message sent to a server process. Unblocking the client may include determining by the operating system that a timeout has expired without the server having replied to the message and then sending a request to the server process reply to the message to unblock the client. After sending the request for the server to reply to the message, the operating system may determine that the server has still not replied to the message after a further period has elapsed. If so, one or more actions related to the server process may be triggered. For example, a signal may be sent to the server process or the computer system may be rebooted.

Unblocking processes in interprocess messaging passing

A system includes a processor and memory storage units storing software code. The software code comprises code for a scheduling system and for generating a plurality of adaptive partitions that are each associated with one or more process threads and that each have a corresponding processor budget. The code also is executable to, when the system is under a normal load, allocate the processor to one of the threads that is in a ready state and has the highest priority among the process threads that are in a ready state. The code is also executable to, when the system is in overload, allocate the processor to one of the process threads that is in a ready state and has the highest priority among the process threads that are in a ready state and for which the adaptive partition that the process thread is associated with has available guaranteed processor budget.

Process scheduler employing adaptive partitioning of process threads

An adaptive partition scheduler is a priority-based scheduler that also provides execution time guarantees (fair-share). Execution time guarantees apply to threads or groups of threads when the system is overloaded. When the system is not overloaded, threads are scheduled based strictly on priority, maintaining strict real-time behavior. When the system is overloaded, threads are scheduled based priority of threads that are in a ready state and based on the available guaranteed processor time budget of the adaptive partition associated with each thread.

Adaptive partitioning for operating system

A system and method wherein a set of privileges assigned to a process may be modified responsive to a request. The modification may apply to one or more abilities within the set of privileges and may be applied during execution of the process subsequent to the process creation time. Accordingly a process may be created with a default set of privileges and subsequently the privileges may be modified (e.g. to include a sub-set of the default privileges) thereby mitigating the risk of malicious exploitation of the process through attack.

System and method for changing abilities of a process

A system includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. The software code further includes a scheduling system that is executable by the processor for selectively allocating the processor to run the process threads based on a comparison between ordering function values for each adaptive partition. The ordering function value for each adaptive partition is calculated using one or more weighted variables for each adaptive partition. The variables include, for example, 1) the process budget, such as a guaranteed time budget, of the adaptive partition, 2) the critical budget, if any, of the adaptive partition, 3) the rate at which the process threads of an adaptive partition consume processor time.

Process scheduler employing ordering function to schedule threads running in multiple adaptive partitions

A system is set forth that includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of the plurality of adaptive partitions has a corresponding processor budget that is assigned to it. The process threads include a mutex holding thread and a mutex waiting thread. The mutex holding thread is associated with a first adaptive partition and may gain exclusive access to a mutex object. The mutex waiting thread is associated with a second adaptive partition and must wait for access to the mutex object while the mutex object is held by the mutex holding thread. The software code further includes a scheduling system that selectively allocates the processor to run the process threads based, at least in part, on the processor budget of the associated adaptive partitions. The scheduling system bills processor allocation used to run the mutex holding thread to the processor budget of the second adaptive partition when the processor budget of the first adaptive partition has been exhausted.

Process scheduler having multiple adaptive partitions associated with process threads accessing mutexes and the like

A system is set forth comprising a processor and memory storage units storing software code. The software code comprises code for a scheduling system and for generating a plurality of adaptive partitions that are each associated with one or more software threads and that each have a corresponding processor budget. The code also is executable to generate at least one sending thread and at least one receiving thread which responds to communications from the sending thread to execute one or more tasks corresponding to the communications. In operation, the scheduling system selectively allocates the processor to each sending and receiving thread based on the processor budget of the adaptive partition associated with the respective thread. The scheduling system bills the processor budget of the adaptive partition associated with the sending thread for processor allocation used by the receiving thread to respond to communications sent by the sending thread.

An adaptive partition scheduler is a priority-based scheduler that also provides execution time guarantees (fair-share). Execution time guarantees apply to threads or groups of threads when the system is overloaded. When the system is not overloaded, threads are scheduled based strictly on priority, maintaining strict real-time behavior. Even when overloaded, the scheduler provides real-time guarantees to a set of critical threads, as specified by the system architect.

A processing system includes a page table including a plurality of page table entries. Each of the plurality of page table entries includes information for translating a virtual address page to a corresponding physical address page. The processing system also includes a translation lookaside buffer adapted to cache page table information. The processing system also includes memory management software responsive to changes in the page table to consolidate a run of contiguous page table entries into one or more page table entries having a larger memory page size, Y. The memory management software further determines whether the run of contiguous page table entries may be cached in an entry of the translation lookaside buffer that caches multiple page table entries, X, in a single translation lookaside buffer entry.

Processing system implementing variable page size memory organization using a multiple page per entry translation lookaside buffer

A processing system includes memory management software responsive to changes in a page table to consolidate a run of contiguous page table entries into a page table entry having a larger memory page size. The memory management software determines whether the run of contiguous page table entries may be cached using the larger memory page size in an entry of a translation lookaside buffer. The translation lookaside buffer may be a MIPS-like TLB in which multiple page table entries are cached in each TLB entry.

A system includes a processor, one or more memory storage units, and software code stored in the memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of adaptive partition has one or more corresponding assigned scheduling attributes. The software code includes a scheduling system for selectively allocating the processor to run process threads based on a comparison between ordering function values for each adaptive partition. Ordering function values are calculated based on scheduling attributes of the corresponding adaptive partition. A critical ordering function value also may be calculated and used to determine the proper manner of billing an associated adaptive partition for the processor allocation used to run its associated critical threads. Methods of implementing various aspects of such a system are also set forth.

A system is set forth that includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of the plurality of adaptive partitions has a corresponding processor time budget. One or more of the process threads are designated as critical threads. Each adaptive partition associated with a critical thread is assigned a corresponding critical time budget. The software code also includes a scheduling system that is executable by the processor for selectively allocating the processor to run the process threads based, at least in part, on the processor time budgets of the respective adaptive partitions. The scheduling system may allocate the processor to run a critical thread based on the available critical time budget of the associated adaptive partition even when the processor time budget of the associated adaptive partition has been exhausted. In one example, the scheduling system functions so that it only bills the critical time budget of an adaptive partition for time used to run an associated critical thread when the processor is overloaded and the critical time budget for the adaptive partition is concurrently exhausted. Methods of implementing such a system are also set forth.

Process scheduler employing adaptive partitioning of critical process threads

A processing system includes memory management software responsive to a translation lookaside buffer miss. The memory management software updates translation lookaside buffer information based on one or more missed virtual addresses. Entries of a first translation lookaside buffer are updated by the memory management software with information corresponding to the missed virtual addresses if memory page size information for the missed virtual addresses meet a first criterion. Entries of a second translation lookaside buffer are updated by the memory management software with information corresponding to the missed virtual addresses if memory page size information for the missed virtual addresses meet a second criterion. The first and second criterion may correspond to first and second memory page sizes supported by the respective translation lookaside buffers.

Processing system implementing multiple page size memory organization with multiple translation lookaside buffers having differing characteristics

A processing system includes memory management software responsive to changes in a page table. The memory management software consolidates contiguous page table entries into one or more page table entries that have larger memory page sizes. The memory management software updates the entries of a translation lookaside buffer that correspond to the consolidated contiguous page table entries.

Processing system implementing variable page size memory organization

A processing system includes initialization software that is executable by a processor to identify one or more memory page sizes supported by the processing system. The supported memory page sizes that are identified by the initialization software are stored in one or more memory page size identification registers. Individual bits of the one or more memory page size identification registers may be respectively associated with a memory page size. Whether a memory page size is supported by the processing system may be determined by checking the logic state of the individual bit corresponding to the memory page size.

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Kanata, Canada

Brian John Stecher