Micron Technology Incorporated

Brian Hirano

Sean Stephen Eilert

Ameen D Akel

Justin M Eno

Methods, systems, and devices for in-memory associative processing for vectors are described. A device may perform a computational operation on a first set of contiguous bits of a first vector and a first set of contiguous bits of a second vector. The first sets of contiguous bits may be stored in a first plane of a memory die and the computational operation may be based on a truth table for the computational operation. The device may perform a second computational operation on a second set of contiguous bits of the first vector and a second set of contiguous bits of the second vector. The second sets of contiguous bits may be stored in a second plane of the memory die and the computational operation based on the truth table for the computational operation.

In-memory associative processing for vectors

Methods, systems, and devices for in-memory associative processing are described. An apparatus may receive a set of instructions that indicate a first vector and a second vector as operands for a computational operation. The apparatus may select, from a set of vector mapping schemes, a vector mapping scheme for performing the computational operation using associative processing. The apparatus may write the first vector and the second vector to a set of planes each comprising an array of content-addressable memory cells based on the selected vector mapping scheme.

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Longmont, CO, United States of America

Brian Hirano