Lsi Logic Corporation

Hyundai Electronics America, Inc.

At&t Global Information Solutions Company

Symbios Logic Inc.

Brian G Reise

William K Petty

Paul Jeffrey Smith

Mark J Jander

Kevin Michael Rishavy

David W Carpenter

Eugene E Freeman

Raymond F Emnett

A multipurpose configurable bus independent simulation bus functional model for testing a circuit is described. The multipurpose bus functional model utilizes a configurable data structure to interact with a device being tested by providing high-level test generation routines defined by the bus interface specified. The configurable data structure allows for verification of both signal timing and functional operation bus specifications. This data structure technique utilizes a standardized and parameterized method that allows variations and multiple instances of test bench models to be generated and instantiated in a design test environment. The bus functional model also sub-divides general functions and data structures into separate re-usable functional blocks. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other researcher to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Method and apparatus for a multipurpose configurable bus independent simulation bus functional model

A simulation test bench environment for testing a circuit is described. The test bench environment uses high-level task routines executed by one or more bus functional device models to generate input test vectors. A timing and protocol checker verifies both signal timing and functional operation bus specifications. Data and parity miscompares and corruptions are reported in real-time during simulation. An error and interrupt handler services errors and interrupts by communicating with the buses coupled to the circuit to execute specific recovery routines. A memory model is used to generate known expected data for data transactions, to store data from the circuit on data transactions, and to generate operation codes for the circuit.

Method and apparatus for design verification of an integrated circuit using a simulation test bench environment

In a multifunction PCI device containing identical backend functions or other large, redundant functional blocks, a single backend function is selected as a primary function while in test mode. All backend I/O channels are then simultaneously tested in parallel, with the same data and control signals from a PCI local bus being driven to all backend channels during the same test clock cycle. A single backend channel is designated as the primary for providing requisite handshaking signals during output to the backend I/O channels. Input data from each backend channel is received in parallel and compared, with miscompares being flagged to allow testing of the input data path from the respective backend I/O channel. Only signals from the primary backend I/O channel are designated for transmission to the PCI local bus. Signals from the remaining backend channels are received in parallel with and compared to the signals from the primary channel, and miscompare flags are generated for any discrepancies identified. The resulting parallel testing of all backend I/O channels within the multifunction device reduces the number of test vectors needed to achieve fault grade goals.

Test mode for multifunction PCI device

An improved CMOS driver circuit for driving a fast, single-ended, wired-or bus architecture. The driver circuit provides a user-selectable active deassertion assist feature which assists a passive terminator circuit in quickly pulling-up a data or control bus line. The resulting driver circuit provides greater noise immunity to negative voltage transients that result from impedance mismatches caused by poor cable design configurations.

CMOS driver for fast single-ended bus

Growing community of inventors

Colorado Springs, CO, United States of America

Brian G Reise