Average Co-Inventor Count = 3.92
ph-index = 12
The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.
Company Filing History:
1. International Business Machines Corporation (65 from 164,108 patents)
65 patents:
1. 10169605 - Implementing block device extent granularity authorization model processing in CAPI adapters
2. 10078595 - Implementing hardware accelerator for storage write cache management for managing cache destage rates and thresholds for storage write cache
3. 10055606 - Implementing block device extent granularity authorization model processing in CAPI adapters
4. 10055573 - Implementing extent granularity authorization and deauthorization processing in CAPI adapters
5. 10055156 - Implementing extent granularity authorization command flow processing in CAPI adapters
6. 10055574 - Implementing extent granularity authorization processing in CAPI adapters
7. 10043028 - Implementing extent granularity authorization processing in CAPI adapters
8. 10013572 - Implementing extent granularity authorization command flow processing in CAPI adapters
9. 9940253 - Implementing hardware accelerator for storage write cache management for destage operations from storage write cache
10. 9940255 - Implementing hardware accelerator for storage write cache management for identification of data age in storage write cache
11. 9940257 - Implementing hardware accelerator for storage write cache management for managing cache line updates for purges from storage write cache
12. 9940256 - Implementing hardware accelerator for storage write cache management for managing cache line updates for writes, reads, and destages in storage write cache
13. 9940258 - Implementing hardware accelerator for storage write cache management for merging data with existing data on fast writes to storage write cache
14. 9940251 - Implementing hardware accelerator for storage write cache management for reads from storage write cache
15. 9940252 - Implementing hardware accelerator for storage write cache management for reads with partial read hits from storage write cache