International Business Machines Corporation

Brian Eldridge Clark

Bruce Marshall Walk

Joseph Edward Bolan

Gregory Robert Klouda

Michael Joseph Corrigan

Richard Karl Kirkman

Francis Daniel Lawlor

Scott Alan Plaetzer

Paul LuVerne Godtland

Patrick James Christenson

George D Timms, Jr

Donald Arthur Morrison

Terrence James Stewart

Raymond S McRoberts

Milton F Bond

Werner E Schmidt-Stumpf

An apparatus and method provide simultaneous local and global addressing capabilities in a computer system. A global address space is defined that may be accessed by all processes. In addition, each process has a local address space that is local (and therefore available) only to that process. An address space processor is implemented in software to perform system functions that distinguish between local addresses and global addresses. In the preferred embodiments, the local address space has a size that is a multiple of the size of a segment of global address space. When the hardware indicates a page fault, the address space processor determines whether the address being translated is a local address or a global address. If the address is a local address, the address space processor uses a local directory to process the page fault. If the address is a global address, the address space processor uses a global directory to process the page fault. When the hardware indicates an addressing error because a computed address crosses a global segment boundary, the address space processor determines whether the address is a local address or a global address. If the address is a global address, the address space processor indicates an addressing error. If the address is a local address, the address space processor determines whether the address is within the process' local address space, and indicates an addressing error if the address is outside the process' local address space. Instructions are allowed to operate on both local and global addresses because the address space processor handles either type of address whenever software assistance is required, such as for servicing a page fault or checking a segment boundary crossing. In addition, the address space processor dynamically checks the addressing compatibility of called code before passing control to the called code.

Apparatus and method for providing simultaneous local and global addressing using software to distinguish between local and global addresses

Under-hat cooler

System control of compression and decompression of data based upon system aging parameters, such that compressed data becomes a system managed resource with a distinct place in the system storage hierarchy. Processor registers are backed by cache, which is backed by main storage, which is backed by decompressed disk storage, which is backed by compressed disk storage then tape, and so forth. Data is moved from decompressed to compressed form and migrated through the storage hierarchy under system control according to a data life cycle based on system aging parameters or, optionally, on demand: data is initially created and stored; the data is compressed at a later time under system control; when the data is accessed, it is decompressed on demand by segment; at some later time, the data is again compressed under system control until next reference. Large data objects are segmented and compression is applied to more infrequently used data. A dedicated compression input/output processor (IOP) is controlled by host system defined data structures which include a bus transport mechanism (BTM) which is DMA loaded to the compression IOP storage. The BTM includes a request response control block (RRCB) comprising a compress or decompress operation command, a data out descriptor (DOD) for providing the address of data in host storage that needs to be compressed or decompressed, and data in descriptor (DID) for providing the address in host storage where the resulting decompressed or compressed data is to be stored.

Dedicated input/output processor method and apparatus for access and storage of compressed data

Dedicated input/output processor method and apparatus for access and

A storage management mechanism maintains parity records on the storage units it services, and includes a status map indicating, for each data block, the location of the corresponding parity block, and the status of the data block. If a single storage unit fails, the mechanism is placed in a failure operating mode while the system continues to operate. While in failure operating mode, storage management verifies status before accessing data on the failed storage unit. If the data has not yet been reconstructed, storage management first reconstructs the data block by successively reading and accumulating an Exclusive-OR of the corresponding blocks on all other storage units in the parity group. The reconstructed data block is then stored in the location of the parity block, and the status map is updated to indicate that the block has been reconstructed. Once the data has been reconstructed, it is only necessary to read from or write to the former parity block directly. Storage management will similarly reconstruct a block of storage on the failed unit before writing to any corresponding block on a non-failed unit, if the block has not yet been reconstructed. In an alternate embodiment, spare areas of storage in the non-failing storage units are allocated to the reconstructed data. The total of these spare areas constitute a virtual spare storage unit. As data is reconstructed, it is placed in the virtual spare unit, and parity is maintained in the normal fashion.

Method and apparatus for recovering parity protected data

A storage management mechanism distributes parity blocks corresponding to multiple data blocks substantially equally among a set of storage devices. N storage units in a set are divided into a multiple of equally sized address blocks, each containing a plurality of records. Blocks from each storage unit having the same address ranges form a stripe of blocks. Each stripe has a block on one storage device containing parity for the remaining blocks of the stripe. Further stripes also have parity blocks, which are distributed on different storage units. Parity updating activity associated with every change to a data record is therefore distributed over the different storage units, enhancing access characteristics of the set of storage devices. The parity updating activity also includes the use of an independent version number stored with each data record and corresponding version numbers stored with the parity record. Each time a data record is changed, its version number is incremented and the corresponding version number in the parity record is incremented with the parity record update.

Parity spreading to enhance storage access

Growing community of inventors

Rochester, MN, United States of America

Brian Eldridge Clark