International Technology Center

Brian Douglas Schultz

Gary Elder McGuire

William McClure Hooke

Mark Alan Ray

Allen Richard Martin

Michael J Kelly

A plasma generating system. A pair of electrodes are spaced apart by an electrode gap. A source of a gas adapted to place the gas in the electrode gap. A power generating circuit is coupled to the electrodes to generate an electric field across the electrodes so as to initiate a plasma discharge within the electrode gap. The power generating circuit has adequate capacity to maintain a sufficient electric field across the gap during the plasma discharge to allow a plasma impedance to self-tune to the plasma generating system. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Self-tuned dielectric barrier discharge

A semiconductor structure consistent with certain implementations has a crystalline substrate oriented with a {111} plane surface that is within 10 degrees of surface normal. An epitaxially grown electrically insulating interlayer overlays the crystalline substrate and establishes a coincident lattice that mates with the surface symmetry of the {111} plane surface. An atomically stable two dimensional crystalline film resides on the epitaxial insulating layer with a coincident lattice match to the insulating interlayer. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Semiconductor structure with coincident lattice interlayer

A method of generating a glow discharge plasma involves providing a pair of electrodes spaced apart by an electrode gap, and having a dielectric disposed in the electrode gap between the electrodes; placing the electrodes within an environment, wherein the electrode gap can be provided with a gas or gas mixture containing carbon at a specified pressure; and applying a rapid rise time voltage pulse across the electrodes to cause an extreme overvoltage condition, wherein the rapid rise time is less than a plasma generation time so that the extreme overvoltage condition occurs prior to current flow across the electrode gap. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Pulsed dielectric barrier discharge

A semiconductor structure consistent with certain implementations has a crystalline substrate oriented with a {111} plane surface that is within 10 degrees of surface normal. An epitaxially grown electrically insulating interlayer overlays the crystalline substrate and establishes a coincident lattice that mates with the surface symmetry of the {111} plane surface. An atomically stable two dimensional crystalline film resides on the epitaxial insulating layer with a coincident lattice match to the insulating interlayer. Methods of fabrication are disclosed. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

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Brian Douglas Schultz