Pmc-sierra, Inc.

Integrated Telecom Technology

Pmc-sierra (maryland), Inc.

3com Corporation

Network Synthesis, Inc.

Brian D. Holden

Brian D Holden

Darren S Braun

Brian D Alleyne

Nadeem Haq

Chee Hu

Imran N Chaudhri

Edward Lennox

Mitri Halabi

Dinesh Venkatachalam

Raghavan Menon

Steve T Sprouse

Kevin Reno

Denis A Smetana

Richard A Smedley

Imran Chaudhri

Methods and devices useful in high-speed scalable switching systems include a memoryless switch fabric, per virtual channel queuing, digital phase aligners, randomized and complement connection modes, a mid-point negative acknowledge and output negative acknowledge scheme among other elements. A particular implementation of a routing table and switch element is described in part to illustrate the various techniques and devices of the invention.

Apparatus for high speed communication system

Method for a high speed communication system

A segmentation and reassembly processor ( ) is disclosed for use in interfacing a group of time-division multiplexed lines ( ) to a cell-based communication environment ( ). The SAR uses a bit-table calendar ( ) to schedule cells to be sent to the cell-based network. A cell service decision circuit ( ) reads frame events from a frame advanced FIFO ( ) and signals a cell builder ( ) to assemble cells of data from a frame buffer ( ) for transmission to a cell based output ( ).

Asynchronous bit-table calendar for ATM switch

Method for signaling in a high speed communication system

A system and method for flushing cells in an ATM network sets an interval timer during which it would be expected that an active physical output would indicate it could accept a cell. When an interval elapses, a physical output that has not indicated it is ready to accept a cell is marked as disabled and may remain so until the output is reset. Cells in an output queue to a disabled cell are flushed during periods when no higher priority cells are available to be sent.

Method and apparatus for detecting disabled physical devices and deleting undeliverable cells

An ATM switching system architecture of a switch fabric-type is built of, a plurality of ATM switch element circuits and routing table circuits for each physical connection to/from the switch fabric. A shared pool of memory is employed to eliminate the need to provide memory at every crosspoint. Each routing table maintains a marked interrupt linked list for storing information about which ones of its virtual channels are experiencing congestion. This linked list is available to a processor in the external workstation to alert the processor when a congestion condition exists in one of the virtual channels. The switch element circuit typically has up to eight 4-bit-wide nibble inputs and eight 4-bit-wide nibble outputs and is capable of connecting cells received at any of its inputs to any of its outputs, based on the information in a routing tag uniquely associated with each cell.

ATM architecture and switching element

An UTOPIA level 2 interface over a backplane for connecting up to 31 Physical layer devices to one ATM layer device in a logically partitioned manner utilizing full bandwidth. The communications data is received on a first terminal at a first transfer rate. The communications data transfer rate is reduced from the first transfer rate to a second transfer rate. At the second transfer rate, the communications data is transferred over a backplane to a second terminal. On the second terminal, communications data transfer rate is increased from the second transfer rate to the first transfer rate. The first transfer rate is greater than the second transfer rate.

Mechanism to support an UTOPIA interface over a backplane

A congestion detection system and method for an advanced ATM network measures congestion in a number of dimensions. In one embodiment, cell traffic is measured on a per virtual channel basis, per service class queue basis and a per device basis within an input routing table, and additionally on a per virtual output and per service class basis within an output routing table. In a specific embodiment, upon each measurement, cell traffic is compared to thresholds corresponding to that measurement's congested and maximum limit and a congestion or maximum signal is sent if that threshold is exceeded.

Many dimensional congestion detection system and method

A segmentation and reassembly processor (10) is disclosed for use in interfacing a group of time-division multiplexed lines (25) to a cell-based communication environment (20). The SAR uses a bit-table calendar (100) to schedule cells to be sent to the cell-based network. A cell service decision circuit (50) reads frame events from a frame advanced FIFO (40) and signals a cell builder (60) to assemble cells of data from a frame buffer (70) for transmission to a cell based output (50).

ATM switching element and method having independently accessible cell

Method and apparatus for enqueueing data cells in an ATM switch fabric

Methods and apparatus for enqueueing and dequeueing data cells in an ATM

Growing community of inventors

Sunnyvale, CA, United States of America

Brian D Holden