Lsi Corporation

Lsi Logic Corporation

Brian A Day

Patrick R Bashford

Ganesan Viswanathan

Vetrivel Ayyavu

Timothy E Hoglund

Brad D Besmer

Silvia E Jaeckel

Parameshwar Ananth Kadekodi

Srikiran Dravida

Bret S Weber

Richard L Solomon

William K Petty

Robert E Ward

Mark J Jander

Joshua P Sinykin

Coralyn S Gauvin

Scott Dominguez

Roger T Clegg

Guy Kendall

Jeffrey M Rogers

Frantisek Gasparik

Jana Lynn Richards

Bradley Dean Besmer

Ajay Dawra

Kabra Nitin Satishchandra

Kevin A Mocklin

David J Golden

Ayyavu Vetrivel

Methods and apparatus for packing received Serial Attached SCSI (SAS) frames in buffers for transmission to a host system memory. SAS frames are received from another SAS device and stored in a frame buffer memory. User data in the received frames has appended SCSI Data Integrity Fields (DIF information) to enhance reliability. Features and aspects hereof use the DIF information to validate the user data and then strip the DIF information to densely pack the validated user data in a DMA staging buffer for transmission to a host's system buffer memory using DMA features of the SAS device. The DMA circuit is programmed and started when the staging buffer is filled to at least a threshold amount of data to thereby improve efficacy of the DMA transfer performance. Other criteria may also be employed to determine when to start the DMA circuit.

Methods and apparatus for packing received frames in buffers in a serial attached SCSI (SAS) device

A SAS expander or initiator places PHYs in a wide port into a persistent reduced power state by signaling to the connected SAS device that the SAS expander or initiator intends to route data traffic through other PHYs in the wide port. The SAS expander or initiator and connected SAS device agree to disuse certain PHYs so that the PHYs enter a reduced power state according to SAS standards.

Method for optimizing wide port power management in a SAS topology

Methods and structures for validating tag information received in SAS frames by any of a plurality of ports comprising a SAS wide port. Each port may have a dedicated transport layer processing element. A tag information table is shared by all of the one or more transport layer processing elements. The tag information table is used to store information regarding a particular tag value being valid for use with a particular device and is updated when the particular tag value is no longer valid for use with the particular device. The information is initially stored in response to transmission of a frame that first uses the particular tag value with the particular device. The tag information table is updated to indicate the particular tag value is no longer valid upon receipt of an appropriate SAS frame or by a processing element external to the one or more transport layer processing elements.

Systems and methods for tag information validation in wide port SAS connections

Methods and systems are provided for managing power allocation to a SAS target coupled with a SAS initiator through a SAS expander. The expander exchanges messages with the target to manage the power allocation to the target. The target transmits a power request message through the expander to the initiator. In some embodiments, the initiator transmits a power request received message to the expander. The expander may then transmit a power grant message to the target in response to receiving the power request received message. In other embodiments, the expander monitors the messages transmitted from the target to the initiator. The expander may then transmit a power grant message to the target in response to the expander monitoring the power request message.

Power managment for storage devices

Methods and apparatus for improved performance in communications between a SAS/STP initiator device and a plurality of SATA storage devices coupled with the initiator through an enhanced switching device. The switching device is enhanced in accordance with features and aspects hereof to receive a DMA SETUP FIS from a SATA storage device and to transmit multiple modified DMA SETUP FISs to the initiator where each modified DMA SETUP FIS comprises a subcount less than the maximum count in the received DMA SETUP FIS.

Methods and apparatus for improved host/initiator utilization in serial advanced technology attachment communication

Methods and apparatus for improved performance in communications with a SATA target device. Features and aspects hereof provide for continuing DMA transfers from a storage controller (e.g., a SATA host or a SAS/STP initiator) to a SATA target device without regard to receipt of DMA ACTIVATE Frame Information Structures (FIS). Logic to implement these features may be provided by bridge logic within an enhanced SAS expander coupled with an enhanced SAS/STP initiator or may be provided by suitable logic in an enhanced SATA host coupled directly with an enhanced SATA target device. By continuing DMA transfer of data from the initiator/host to the SATA target device without regard to receipt of a DMA ACTIVATE FIS, more of the available bandwidth of the SAS/SATA communication link may be utilized. Other standard features of the SAS/SATA protocols provide for flow control to prevent overrun of the SATA target device's buffers.

Methods and apparatus for improved serial advanced technology attachment performance

Apparatus and method for managing power consumption of circuits within a Serial Attached SCSI (SAS) device. A SAS device having a plurality of PHY logic circuits includes a queue manager and a power manager. The queue manager is operable to determine a current workload based on queued entries for the plurality of PHY logic circuits. Based on the current workload, the power manager is operable to set identified ones of the plurality of PHY logic circuits into a low power mode. In some embodiments, PHY logic circuits may be restored to full power operation responsive to changes in the current workload and/or responsive to receipt of a signal from another SAS device coupled to the SAS device. In other embodiments the power manager is further operable to manage power consumption of link and/or DMA logic circuits of the SAS device.

Methods and apparatus for load-based power management of PHY logic circuits of a SAS device based upon a current workload

Methods and systems for improved management of power allocation among a plurality of devices coupled to a controller. The controller and devices exchange messages to request, grant, and release allocations of power from a common power supply. In some embodiments, the controller may be a SAS/SATA controller and the messages exchanged may be SAS/SATA frames and/or primitives. In exemplary embodiments, the messages may request/grant a particular amount of power for each of one or more voltage levels provided by the power supply. In other exemplary embodiments, the messages may designate the duration of time during which the requesting device may utilize the allocated power. A power status message from the device to the controller may indicate a change in the power consumption by the device. Responsive to the power status message the controller may re-allocate power previously allocated to a device that has completed use thereof.

Methods and apparatus for power allocation in a storage system

Methods and systems for encoding and/or decoding digital signals representing serial attached SCSI (SAS) out of band (OOB) signals exchanged over an optical communication between two SAS devices. A SAS OOB signal to be transmitted from a first SAS device to a second SAS device is first encoded as a digitally encoded signal representing the analog SAS OOB signal and then transmitted over an optical communication medium to another SAS device. A receiving SAS device coupled to an optical communication medium decodes a received digitally encoded signal to detect a received, encoded SAS OOB signal and processes the received SAS OOB signal when receipt is detected. The digitally encoded signal may comprise an idle word portion and a burst word portion to represent various SAS OOB signals. Further, the digitally encoded signal may be precomputed in a variety of disparity forms and stored in a memory for lookup and retrieval.

Methods and apparatus for interconnecting SAS devices using either electrical or optical transceivers

Methods and systems for communication between two storage controllers. A first storage controller specifies a special frame indicator in a frame of a protocol that is also used by a first storage controller to send a storage command to a storage device. The first storage controller transmits the frame to a second storage controller such that the frame comprises data in a payload field of the frame.

Methods and systems for communication between storage controllers

A system for sending large Command Descriptor Block (CDB) structures in a serial attached SCSI (SAS) controller includes a CDB Transmit Block, a CDB Memory, a Context Memory, a Direct Memory Access (DMA) Queue, a Transmit DMA Engine, and a SAS Interface. The CDB Transmit Block receives one or more Message Frames. If the CDB is small (32 bytes or less), the CDB Transmit Block reads data from the Message Frame and transmits a SAS Command Frame over the SAS interface. If the CDB is large (33 bytes or more), the CDB Transmit Block places a large CDB entry into the DMA Queue. The Transmit DMA Engine receives the large CDB entry from the DMA queue, utilizes an address pointer from the Message Frame to the CDB Memory to fetch large CDB information into a DMA buffer, and transmits a SAS Command Frame over the SAS interface.

Sending large command descriptor block (CDB) structures in serial attached SCSI (SAS) controller

Methods and structures for assuring proper sequencing of processing of SAS frames received over multiple physical ports of a SAS wide port. A frame scheduler element is communicatively coupled with a SAS transport layer and with a corresponding plurality of link layers operable as a SAS wide port. The frame scheduler receives a request from the transport layer to locate or select a next received frame for further processing. The frame scheduler interacts with the plurality of link layer processing elements having received frames stored within to locate the link layer that has the requested next frame. The frame scheduler then coordinates operation of that link layer and the transport layer to effectuate the transfer of the required next frame.

Systems and methods for frame ordering in wide port SAS connections

The present invention is directed to a system and method for emulating a serial small computer system interface (SAS) connection for direct attached serial advanced technology attachment (SATA) communication are disclosed. A system in accordance with the present invention includes a host controller. The host controller includes a physical interface for accepting at least one of a SAS connection or a direct attached SATA device. A common interface logic configured to receive SAS communications and SATA communications having a SAS emulated connection is included in the host controller. An emulation logic is communicatively coupled to the common interface logic. The emulation logic being configured to determine a value of a ConnectedSata signal based on the state of a SATA link state machine.

Serial attached small computer system interface (SAS) connection emulation for direct attached serial advanced technology attachment (SATA)

Methods and associated structure to assure correct order in delivery of SATA frames over a SAS wide port. In one aspect hereof, new connection requests from a SATA device are rejected until prior frames residing in receive buffers of the SAS/SATA controller are properly processed. In another aspect, when a device is already connected to the controller, the SAS/SATA controller may prevent return of a receiver ready primitive in response to a transmitter ready primitive until previously received frames are removed from the receive buffers.

Methods and structure for assuring correct data order in SATA transmissions over a SAS wide port

Apparatus and methods for enabling multiple, unidirectional, virtual connections between a first SAS device and multiple other SAS devices in a SAS domain. An enhanced first SAS device may be substantially simultaneously coupled to each of two other SAS devices through one or more appropriately enhanced SAS expanders to allow substantially simultaneous unidirectional virtual connections from the first SAS device to both of the second and third SAS devices. Each virtual connection is, in essence, a half-duplex connection such that the first device is transmitting information to a second SAS device substantially simultaneous with the first device receiving information from a third SAS device. The enhancements are provided in a manner to allow backward compatibility with current SAS specifications for connectivity among devices not suitably enhanced in accordance with features and aspects hereof (e.g., with legacy devices).

Growing community of inventors

Colorado Springs, CO, United States of America

Brian A Day