Rockley Photonics Limited

Apple Inc.

Brett Sawyer

SeungJae Lee

Chia-Te Chou

Vivek Raghunathan

David Arlo Nelson

Karlheinz Muth

Vivek Raghuraman

Ying Luo

Hooman Abediasl

Gerald Cois Byrd

John Drake

Jerry L Byrd

Jerry Byrd

Michael Lee

David Mccann

Seungjae Lee

A semiconductor package. In some embodiments, the package has a top surface and a bottom surface, and includes: a semiconductor die having a front surface, a back surface, and a plurality of edges; a mold compound, on the back surface of the die and the edges of the die; a plurality of first conductive elements extending through the mold compound on the back surface of the die to the top surface of the package; and a plurality of second conductive elements on the bottom surface of the package.

Packaging of three-dimensional integrated circuit by encapsulation with copper posts and double sided redistribution layer

A via frame. In some embodiments, the via frame includes: a sheet of epoxy mold compound, having a plurality of holes each extending through the sheet of epoxy mold compound, and a plurality of conductive elements, each extending through a respective one of the holes.

Through mold via frame

A siliconized heterogeneous optical engine. In some embodiments, the siliconized heterogeneous optical engine includes a photonic integrated circuit; an electro-optical chip, on a top surface of the photonic integrated circuit; an electronic integrated circuit, on the top surface of the photonic integrated circuit; an interposer, on the top surface of the photonic integrated circuit; a redistribution layer, on a top surface of the interposer, the redistribution layer including a plurality of conductive traces; and a plurality of protruding conductors, on the conductive traces of the redistribution layer. The electronic integrated circuit may be electrically connected to the electro-optical chip and to a conductive trace of the plurality of conductive traces of the redistribution layer.

Siliconized heterogeneous optical engine

Embodiments are directed to a photonic device that includes a first substrate defining a surface and a trench forming a depression along a portion of the surface, and a second substrate coupled with the surface and extending from the surface to form a raised portion around the trench. The photonic device can also include a laser die positioned within the trench, such that the laser die is surrounded by the second substrate, and an optical material positioned within a region between the laser die and the second substrate. The photonic device can further include a third substrate coupled with the second substrate such that the second substrate is positioned between the first substrate and the third substrate such that the second substrate is configured to at least partially isolate the laser die from mechanical stress exerted on the optical device.

Photonic integrated circuits with controlled collapse chip connections

An assembly. In some embodiments, the assembly includes a first semiconductor chip, a substrate, and a first alignment element. The alignment of the first semiconductor chip and the substrate may be determined at least in part by engagement of the first alignment element with a first recessed alignment feature, in a surface of the first semiconductor chip.

Integrated self-aligned assembly

A silicon integrated circuit. In some embodiments, the silicon integrated circuit includes a first conductive trace, on a top surface of the silicon integrated circuit, a dielectric layer, on the first conductive trace, and a second conductive trace, on the dielectric layer, connected to the first conductive trace through a first via.

Silicon photonic interposer with two metal redistribution layers

An optical engine. In some embodiments, the optical engine includes an electronic interfacing component including: an upper surface having a plurality of conductors for forming a corresponding plurality of connections to a host board, a lower surface having a plurality of conductors for forming a corresponding plurality of connections to one or more optoelectronic elements, and a plurality of vias extending from the lower surface to the upper surface.

Optical engine

A system integrating a fan-out package, including a first semiconductor die, with a second semiconductor die. In some embodiments the fan-out package includes the first semiconductor die, a mold compound, covering the first semiconductor die on at least two sides, and an electrical contact, on a lower surface of the first semiconductor die. The fan-out package may have a rabbet along a portion of a lower edge of the fan-out package.

Fan-out package with rabbet

An electro-optical package. In some embodiments, the electro-optical package includes a first electro-optical chip coupled to an array of optical fibers, and a first physical medium dependent integrated circuit coupled to the first electro-optical chip.

Electro-optical package and method of fabrication

An assembly. In some embodiments, the assembly includes: a photonic integrated circuit; and an electronic integrated circuit. A front surface of the photonic integrated circuit abuts, in an area of overlap, against a front surface of the electronic integrated circuit. A first portion of the photonic integrated circuit overhangs a first edge of the electronic integrated circuit, and a first portion of the electronic integrated circuit overhangs a first edge of the photonic integrated circuit. A conductor on the front surface of the electronic integrated circuit is connected, in the area of overlap, to a conductor on the front surface of the photonic integrated circuit.

Growing community of inventors

Pasadena, CA, United States of America

Brett Sawyer