Silicon Laboratories Inc.

Cirrus Logic Inc.

Brett E Etter

Timothy Joseph Dupuis

Donald E Alfano

Zhiwei Dong

Donald Keith Coffey

An apparatus includes a regulator circuit that generates a voltage in response to an input current being supplied to an input terminal and functional circuitry, powered by the voltage generated by the regulator circuit. The functional circuitry, e.g., an oscillator, generates a signal using the generated voltage, the signal indicative that the current is being supplied to the apparatus. The signal can be provided over an isolation link to provide a control signal for controlling a high voltage driver circuit.

Isolator circuit including a voltage regulator

A power control system reduces power losses by utilizing an over current protection method that detects an over current event based on a power utilization factor Pand an output voltage of an output stage of the power control system. In at least one embodiment, the power control system detects the over current event without sensing an output current in an output stage of the power control system. Since the output current is not sensed, the power control system avoids power losses otherwise associated with sensing the output current. The power control system includes a power factor correction (PFC) stage and an isolation stage. A controller determines the power utilization factor Pusing voltages sensed from the PFC stage. In at least one embodiment, the controller responds to the over current event by entering an over current protection mode.

Power system having voltage-based monitoring for over current protection

An isolator provides bidirectional data transfer for a plurality of communications channels. First and second dies are located on first and second sides of a voltage isolation barrier and have a first and second plurality of digital data input/output pins associated therewith. First circuitry on the first die and third circuitry on the second die serializes a plurality of parallel digital data inputs from the digital data input/output pins onto one link across the barrier and transmits synchronization clock signals associated with the digital data inputs over a link across the barrier. Second circuitry on the second die and fourth circuitry on the first die de-serializes the digital data inputs from the first link onto the second digital data input/output pins and receives the first synchronization clock signal associated with the digital data inputs on the second link.

Bidirectional multiplexed RF isolator

A system for providing multiple communication channels over a single voltage isolation link includes first circuitry for multiplexing a plurality of digital data inputs from a plurality of communication channels onto the single voltage isolation link. Second circuitry de-multiplexes the plurality of digital data inputs from the single voltage isolation link to the plurality of communication channels. An RF isolator is used for providing the single voltage isolation link.

Multiplexed RF isolator

In order to extend the measurement range of a current sensor, a current divider is formed by a first conductor formed in a current sensor that is mounted on a printed circuit board and a second conductor on the printed circuit board that electrically shorts at least one input terminal of the current sensor to at least one output terminal of the current sensor. The input terminal of the current sensor supplies the current to be measured to the first conductor and the output terminal supplies the measured current back to the printed circuit board.

Method and apparatus for high current measurement

An integrated circuit isolator for providing data transfer of digital data signals across a voltage isolation barrier includes an integrated circuit package having a first plurality of input data pins on one side of the isolation barrier and a corresponding plurality of output data pins on the other side of the isolation boundary. First circuitry is associated with the first plurality of input data pins and second circuitry is associated with the plurality of output data pins. A communications interface provides across the voltage isolation barrier a first communications channel for communicating data from the first circuitry to the second circuitry and a second communications channel for communicating synchronization clock data from the first circuitry to the second circuitry. The first circuitry is operable to communicate information from input digital data overlapping each other in time and received on two or more of the associated first plurality of input data pins across the first communications channel and to communicate the synchronization clock signal across the second communications channel. The second circuitry is operable to receive the communicated data from the first circuitry and reconstruct the data for output on the ones of the plurality of output data pins corresponding to the two or more of the associated plurality of input data pins from which the data was communicated responsive to the synchronization clock signal.

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Austin, TX, United States of America

Brett E Etter