Micron Technology Incorporated

Brenton P Van Leeuwen

Nathaniel J Meier

Christopher John Kawamura

Tae Hyoung Kim

Shea M Morrison

Blakely N Frechette

J Wayne Thompson

Methods of operating memory devices are disclosed. A method may include activating a first, target word line. The method may also include coupling a second word line adjacent the first, target word line to an associated first main word line while the first, target word line is activated. Further, the method may include coupling the associated main word line to a negative word line voltage while the first, target word line is activated. Associated circuits, devices, and systems are also disclosed.

Memory device control schemes, and associated methods, devices, and systems

Memory devices are disclosed. A device may include a number of word line drivers, wherein each word line driver of the number of word line drivers including a first transistor and a second transistor. The device may also include a number of first driver gates, wherein the first transistor of each word line driver has a gate coupled to a dedicated first driver gate of the number of driver gates. Further, the device may include a second driver gate coupled to a gate of each second transistor of each of the number of word line drivers. Associated circuits, methods, and systems are also disclosed.

Word line driver circuitry including shared driver gates, and associated methods, devices, and systems

Memory devices, systems including memory devices, and methods of operating memory devices are described, in which security measures may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a secure access key. In some cases, a customer may define and store a user-defined access key in the fuse array. In other cases, a manufacturer of the memory device may define a manufacturer-defined access key (e.g., an access key based on fuse identification (FID), a secret access key), where a host device coupled with the memory device may obtain the manufacturer-defined access key according to certain protocols. The memory device may compare an access key included in a command directed to the memory device with either the user-defined access key or the manufacturer-defined access key to determine whether to permit or prohibit execution of the command based on the comparison.

Semiconductor device with secure access key and associated methods and systems

Memory devices, systems including memory devices, and methods of operating memory devices are described, in which self-lock security may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a predefined event associated with the memory device operation. The predefined event may include an operating parameter of the memory device, one or more commands directed to the memory device, or both. The memory device may monitor the predefined event and determine that the predefined event satisfies a threshold. The threshold may be related to a time elapsed since the predefined event has occurred or a certain pattern in the one or more commands. Subsequently, the memory device may disable a circuit configured to access the fuse array based on the determination such that an access to the fuse array is no longer allowed.

Semiconductor device with self-lock security and associated methods and systems

Memory devices, systems including memory devices, and methods of operating memory devices are described, in which security locks are implemented to control access to secure functions of the memory devices. In one embodiment, the memory device detects a predetermined signal directed to the memory device. The predetermined signals may include one or more commands directed to the memory device, an operating parameter of the memory device, or both. The memory device may track instances of the predetermined signals to compare with a threshold stored in the memory device. If the memory device determines that the predetermined signals satisfy the threshold, the memory device prohibits access to the secure functions.

Semiconductor devices with security lock and associated methods and systems

Methods, systems, and devices for driving word lines using sub word line drivers are described. A memory array may include a plurality of sub-arrays arranged with gaps in between. Word lines may be arranged across multiple sub-arrays and drive access transistors that are used to selectively access rows (e.g., rows of memory cells) within the sub-arrays. In some examples, signals applied to selection devices driving the word lines may be over-driven for a duration at or near the desired transitions of the word line, and some signals may be driven to a relatively high level for a duration around the high and low transitions of a global row line. Whether a signal is over driven or driven to a relatively high level may depend on the type or types of transistors used in each word line driver.

Sub word line driver

Apparatuses and methods related to memory disablement for memory security. Disabling the memory for memory security can include, responsive to receiving a trigger signal, provide a voltage, which may be in excess of an operating or nominal voltage, to the access circuitry. The voltage may thus be sufficient to render the access circuitry inoperable for accessing data stored in the memory array.

Growing community of inventors

Meridian, ID, United States of America

Brenton P Van Leeuwen