Harris Corporation

Brent R Doyle

Jack E Clark, Ii

Jeffrey C Lee

A current mirror having an amplification factor K providing a photocurrent compensation current to a node having a mismatch of junction photocurrent. The load device on the input leg of the current mirror has an area 1/K times the device width of the larger device junction area at the node and a device width ratio with drive device of the input leg of a current mirror equal to the ratio of mismatch J at the node.

Photocurrent compensation using active devices

An STL or ISL logic circuit comprising a plurality of single-input, multiple-output logic gates is provided. Each of these gates has a current source and a transistor including a base, emitter and multiple Schottky diode-to-collector contacts. The bases of the logic gate transistors are tied together to minimize metal interconnect stripes when a fanout greater than that of one gate is needed. Current hogging is reduced by an ohmic collector contact with connects the collector of each transistor together.

Circuit design technique to prevent current hogging when minimizing

A complementary pair of vertically aligned, inversely operated transistors formed from a P type substrate, a first N type epitaxial layer, a second N type epitaxial layer and a buried, updiffused P type region between the two epitaxial layers. The impurity concentration of the buried region decreases from its junction with the first epitaxial layer to its junction with the second epitaxial layer whose impurity concentration is less than that of the first epitaxial layer. High impurity concentration N type guard ring and P type base ring are diffused simultaneously with the out diffusion of the buried P type region into the second epitaxial layer. The substrate, first epitaxial layer and buried region constitute the emitter, base, and collector of the inverse vertical PNP transistor and the first epitaxial layer, buried region and second epitaxial layer constitute the emitter, base, and collector of the inverse vertical NPN transistor.

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Palm Bay, FL, United States of America

Brent R Doyle