Micron Technology Incorporated

Brent Byron

Douglas Eugene Majerus

Sampath K Ratnam

Kevin Roy Brandt

David Scott Ebsen

Daniel J Hubbard

Aspects of the present disclosure configure a memory sub-system controller to allow a host to deallocate data prior to folding operations. The controller generates an instruction to fold data stored in an individual portion of the set of memory components. The controller, prior to executing the instruction to fold the data stored in the individual portion of the set of memory components, transmits a communication to a host indicative of the instruction to fold the data stored in the individual portion. The controller conditions execution of the instruction to fold the data stored in the individual portion of the set of memory components based on transmission of the communication to the host.

Preemptively warning host of background folding

Various embodiments described herein provide for operation of a memory sub-system based on a profile (also referred to herein as an operational profile) that causes the memory sub-system to have a specific set of operational characteristics. Additionally, some embodiments can provide dynamic switching between profiles based on a set of conditions being satisfied, such as current time of day or detection of a particular data input/out (I/O) pattern with respect to the memory sub-system.

Adjusting characteristic of system based on profile

Described herein is a system that includes a memory component and a processing device coupled to the memory component. The processing device identifies, in a test mode, a memory location of a memory component that is available to write test data, and detects a loss of power to the system while in the test mode. Responsive to detection of the loss of power, the processing device performs a continuous sequence of write operations to write the test data to the memory location using holdup energy until an amount of holdup energy is expended. After reboot of the system, the processing device determines a number of write operations successfully completed in the memory location by the continuous sequence of write operations before the amount of holdup energy is expended, and determines whether the number of write operations successfully completed satisfies a defect criterion. Responsive to the number of write operations successfully completed satisfying the defect criterion, the processing device reports a defect associated with the holdup energy.

Holdup self-tests for power loss operations on memory systems

Described herein are embodiments related to holdup self-tests in memory sub-systems for power loss operations. A processing device receives a request to perform a holdup self-test to detect a defect in a holdup circuit that powers the processing device and a memory component in the event of power loss. The processing device identifies a memory location of memory that is available and, responsive to detection of a loss of power, performs a continuous sequence of write operations to the memory location using holdup energy until all of the holdup energy is expended. After reboot, the processing device determines a number of the write operations that were successfully completed in the memory location before all of the holdup energy was expended. The processing device determines whether the number satisfies a defect criterion. Responsive to the responsive to the number satisfying the defect criterion, the processing device reports the defect associated with the holdup circuit.

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Boise, ID, United States of America

Brent Byron