Micron Technology Incorporated

Aptina Imaging Corporation

Brent A McClure

Thomas M Graettinger

Paul J Schuele

Daryl C New

Earnest Hodge

Er-Xuan Ping

Fred D Fishburn

Casey R Kurth

Hongmei Wang

Lyle D Breiner

Shenlin Chen

Debra K Gould

A method of fabricating a color filter array including the removal of unwanted residual color pigments. A substrate is coated with a colored photoresist layer. The photoresist layer is patterned. The substrate is then cured. A descumming step is performed after the curing step to remove the residual pigments without causing significant damage to the remaining color filter array pattern. In another embodiment, the descumming process may be used to control or manipulate the thickness of the color filter array. In another embodiment, the descumming process may be used to modify the surface of the color filter array to be more desirable for the formation of microlenses or other layers over the color filter array.

Process for color filter array residual pigment removal

A capacitor construction includes a first electrode and a layer between the first electrode and a surface supporting the capacitor construction. The capacitor construction can exhibit a lower RC time constant compared to an otherwise identical capacitor construction lacking the layer. Alternatively, or additionally, the first electrode may contain Si and the layer may limit the Si from contributing to formation of metal silicide material between the first electrode and the supporting surface. The layer may be a nitride layer and may be conductive or insulative. When conductive, the layer may exhibit a first conductivity greater than a second conductivity of the first electrode. The capacitor construction may be used in memory devices.

Capacitor constructions and methods of forming

A method of implanting, for example, a phosphorous plug over a charge collection region and a method of forming a contact over the phosphorous plug implant and charge collection region. The method allows implantation of phosphorous or other materials without contamination of other contact regions. The method further allows implantation of a material with only one step and without an extra masking step.

Self masking contact using an angled implant

Method of forming a contact in a pixel cell

A method used during the formation of a semiconductor device comprises forming a first portion of a digit line contact plug before forming storage capacitors. Subsequent to forming storage capacitors, a second portion of the digit line plug is formed to contact the first portion, then the digit line runner is formed to contact the second plug portion. A structure resulting from the process is also described.

Reduced aspect ratio digit line contact process flow used during the formation of a semiconductor device

A pixel cell having two capacitors connected in series where each capacitor has a capacitance approximating that of the periphery capacitors and such that the effective capacitance of the series capacitors is smaller than that of each of the periphery capacitors. The series-connected capacitors are coupled to the floating diffusion (FD) region for receiving 'surplus' charge from the FD region during saturation conditions.

Imager photo diode capacitor structure with reduced process variation sensitivity

A pixel cell having two capacitors connected in series where each capacitor has a capacitance approximating that at of the periphery capacitors and such that the effective capacitance of the series capacitors is smaller than that of each of the periphery capacitors. The series-connected capacitors are coupled to the floating diffusion (FD) region for receiving &ldquo;surplus&rdquo; charge from the FD region during saturation conditions.

Semiconductor structures formed using redeposition of an etchable layer. A starting material is etched and redeposited during the etch on a sidewall of a foundation. The foundation may be removed or may form an integral part of the structure. The starting material may contain one or more layers of material. The structures are adapted for a variety of capacitor structures.

Semiconductor structures formed using redeposition of an etchable layer

A method for forming a capacitor includes forming a substrate having a node location to which electrical connection to a capacitor is to be made; forming an inner capacitor plate over the node location, the inner capacitor plate having an exposed sidewall; forming an oxidation barrier layer over the exposed inner capacitor plate sidewall; forming a capacitor dielectric plate over the inner capacitor plate, the oxidation barrier layer restricting oxidation of the inner capacitor plate sidewall during formation of the capacitor dielectric plate; and forming an outer capacitor plate over the capacitor dielectric plate. A capacitor is further described which includes an inner capacitor plate having at least one sidewall; an oxidation barrier layer positioned in covering relation relative to the at least one sidewall; a capacitor dielectric plate positioned over the inner capacitor plate; and an outer capacitor plate positioned over the capacitor dielectric plate. In the preferred form of the invention, an insulating dielectric layer is positioned on the oxidation barrier layer, the insulating dielectric layer being of a different composition than the oxidation barrier layer.

Capacitor, and methods for forming a capacitor

A method for forming a structure by redepositing a starting material on sidewalls of a foundation during an etch of the starting material.

Method for forming a structure using redeposition of etchable layer

Disclosed is a method for precision etching of films on in-process integrated circuit wafers. The method is particularly useful for etching films comprising noble metals and is advantageous for use in constructing capacitor electrodes. The method comprises depositing a titanium nitride hard mask over the film to be etched, and thereafter patterning the titanium nitride hard mask with an etchant which is selective to titanium nitride and unselective to the underlying film. The film is then etched using either ion beam milling or reactive ion etching with oxygen as an etching agent. Both etches are highly selective to titanium nitride such that the titanium nitride hard mask can be very thin compared to the film. The presence of the titanium nitride hard mask reduces redeposition problems. Critical dimension control and substantially vertical sidewalls also result from the use of the titanium nitride hard mask.

Method for precision etching of platinum electrodes

A capacitor is described which includes an inner capacitor plate having at least one sidewall; an oxidation barrier layer positioned in covering relation relative to the at least one sidewall; a capacitor dielectric plate positioned over the inner capacitor plate; and an outer capacitor plate positioned over the capacitor dielectric plate. In the preferred form of the invention, an insulating dielectric layer is positioned on the oxidation barrier layer, the insulating dielectric layer being of a different composition than the oxidation barrier layer.

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Boise, ID, United States of America

Brent A McClure