Qualcomm Incorporated

Brendon Lewis Johnson

Andrew Evan Gruber

Rahul Gulati

Donghyun Kim

Jay Chunsup Yun

Alex Kwang Ho Jong

Inyup Kang

Mark Roh

Anshuman Saxena

The disclosure describes techniques for a self-test of a graphics processing unit (GPU) independent of instructions from another processing device. The GPU may perform the self-test in response to a determination that the GPU enters an idle mode. The self-test may be based on information indicating a safety level, where the safety level indicates how many faults in circuits or memory blocks of the GPU need to be detected.

Self-test during idle cycles for shader core of GPU

A graphics processing unit (GPU) of a GPU subsystem of a computing device operates in a first rendering mode to process graphics data to produce a first image. The GPU operates in a second rendering mode to process the graphics data to produce a second image. The computing device detects whether a fault has occurred in the GPU subsystem based at least in part on comparing the first image with the second image.

Diverse redundancy approach for safety critical applications

Techniques of this disclosure may include processing data using one or more processors to produce a first image, including storing intermediate first results of processing the data in at least one internal memory of the one or more processors according to a first memory access pattern, processing the data using the one or more processors to produce a second image, including storing intermediate second results of processing the data in the at least one internal memory of the one or more processors according to a second memory access pattern, wherein the second memory access pattern is different than the first memory access pattern, comparing the first image to the second image, and generating an interrupt if the comparison indicates that the first image is different than the second image.

Memory address flipping to determine data content integrity in GPU sub-system

A graphics processing unit (GPU) of a GPU subsystem of a computing device processes graphics data to produce a plurality of portions of a first image, and to produce a plurality of portions of a second image. The GPU generates a plurality of data integrity check values associated with the plurality of portions of the first image, and a plurality of data integrity check values associated with the plurality of portions of the second image. The GPU determines whether each of the plurality of portions of the second image matches a corresponding portion of the first image. The GPU determines, prior to producing every portion of the second image, whether an operational fault has occurred in the GPU subsystem based at least in part the determination of whether each of the plurality of portions of the second image matches a corresponding portion of the first image.

Tile-based check values for data content integrity in a GPU subsystem

In general, the invention facilitates searching for energy peaks in spread spectrum wireless communication systems with greater precision. More particularly, various embodiments of the invention may involve reporting not only an energy peak and its associated offset, but also the energy levels corresponding to one or more offsets occurring before and after the offset at which the energy peak occurs. Interpolation or extrapolation techniques may be used to predict the actual location of an energy peak based on the apparent location of the peak and the energy levels observed at surrounding offsets.

Growing community of inventors

San Diego, CA, United States of America

Brendon Lewis Johnson