Cisco Technology, Inc.

Bradley D Erickson

Stewart Findlater

Peter Gunadisastra

Sandeep Arvind Patel

Rick Kazuo Yoshida

James P Rivers

Charles Troper Yager

William F Edwards

Surendra Anubolu

Scott A Emery

Gregory Lee DeJager

David H Yen

Amar Chand Amar

Chris Desiniotis

Bruce B Weller

Samir Vasavda

Paul Norwood Booth

Michael Kornprobst

Miodrag Popovic

Kenneth Swanson

Curt Von Badinski

A method and apparatus are provided for a secure interconnect between data modules, including a security apparatus within a secured data interconnect apparatus installed with a security chip. The interconnect apparatus may be authenticated prior to enabling a stacking feature. Authentication of a interconnect apparatus may be used to ensure the quality and performance of the interconnect apparatus and the data modules.

Connection device authentication

A method and apparatus are provided for a secure interconnect between data modules, including a security apparatus within a secured data connection device installed with a security chip. The connection device may be authenticated prior to enabling a stacking feature. Authentication of a connection device may be used to ensure the quality and performance of the connection device and the data modules.

An Interchangeable Standard Port or Stack Port (ISPSP) uses a standard physical connector such as an RJ-45 or SFP. The ISPSP automatically detects whether it is connected to a standard port, such as a 1000BaseT, or whether it is connected to another ISPSP stacking port. This automatic detection can be done through hardware or software. Once the auto-detection is complete the routing platform will automatically configure the ISPSP port for standard 1 Gbps bit rate and framing, or for stacking, e.g., 2.5 Gbps bit rate, and framing.

Interchangeable standard port or stack port

An SFP module provides either a 1000Base-X or SGMII interface protocol to a host and provides a 1000Base-T media dependent interface (MDI). If the SFP module is coupled a host that only implements the 1000Base-X protocol then the SFP module translates the 1000Base-X protocol to the 1000Base-T protocol so that the host MAC sees the 1000Base-T SFP module as if it were an optical transceiver. If the host implements SGMII then the SFP performs auto-negotiation of speed and communicates with the host implement data transfer at a selected rate, e.g., 10, 100, or 1000 Mbps.

10/100/1000Base-T small-form-factor-pluggable module

An electrical connector comprises a housing configured to house an interconnect mechanism, which defines an on-axis plane that is coplanar with the long axis of the interconnect mechanism. The housing includes at least two receptacles for accepting coupling mechanisms for interconnecting the connector to an electronic component. The centerline axis of at least one of the receptacles is parallel to the on-axis plane and offset from the on-axis plane. In one embodiment, the housing further comprises a first lip having a long axis that is parallel with the on-axis plane, such that when the connector is interconnected to an electronic component, the first lip applies an off-axis force to the component. The off-axis force is applied to the component along a first off-axis that is different than the on-axis. Consequently, resistance to deflection of the connector is provided, as is a more reliable contact engagement between the connector and the interconnected electronic component.

Electrical connector having enhanced strain relief for signal-sensitive electronic equipment

A memory system reducing or eliminating the effects of DRAM page-opening delays or row access delays is provided. The system uses DRAM and fast memory such as SRAM. SRAM is used to store the initial portions of data from data blocks and corresponding portions of DRAM are used to store the terminal portions of data from the data blocks. When access to a block of data is requested, DRAM row access procedures are initiated. During the delay period, while DRAM row access procedures are occurring, the initial portion of data from the requested block is read-out from SRAM. By about the time the initial data read-out from SRAM is completed, DRAM row access procedures are completed and the remaining portion of the data is read-out from DRAM.

Method and apparatus for improving performance of DRAM subsystems with

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San Carlos, CA, United States of America

Bradley D Erickson