Texas Instruments Corporation

Freescale Semiconductor,inc.

International Business Machines Corporation

Bradford Lawrence Hunter

Shayan Zhang

Andrew Christopher Russell

Wallace Edward Matthews

James David Burnett

Todd Morgan Rasmus

Timothy F Murphy

Xiaopeng Li

Wan Laan Jackie Hui

Gregory J Schroer

Richard David Nicholson

Robert J Gauthier, Jr

John Atkinson Fifield

JunJun Li

Joseph Andrew Iadanza

Michael Anthony Sorna

Prashant U Kenkare

Michael D Snyder

David R Bearden

Klas Magnus Bruce

Kenneth James Maggio

Benjamin T Voegeli

Troy L Cooper

Jack M Higman

Amol Anil Joshi

Tsing Hsu

David Burnett

Christopher Lee Betty

Karthik Nandimandalam Venkata

Quanqing Hu

Eric Frank Estes

Daniel W Storaksa

Ravindraj Ramaraju

An example cascode voltage regulator circuit includes a first transistor coupled to an input voltage terminal and configured as a source follower to provide an output voltage at a source terminal, a second transistor coupled in series between the source terminal of the first transistor and an output terminal, the second transistor configured as a current limiter, and a current mirror coupled between respective first and second control terminals of the first and second transistors, the current mirror configured to receive a first current indicative of a source follower current flowing through the first transistor and to turn off the second transistor by coupling the first and second control terminals together responsive to the source follower current exceeding a threshold. In an example, the first transistor is a drain-extended NMOS device and the second transistor is a drain-extended PMOS device.

Cascode voltage regulator circuit

A circuit includes a switched capacitor circuit and a voltage generator circuit. The switched capacitor circuit includes first, second, third, and fourth switches and first and second capacitors. The first capacitor has first and second terminals, the first terminal coupled to the first switch. The second capacitor has first and second terminals, the second terminal coupled to the second switch. The third switch has a terminal coupled to the second terminals of the first and second capacitors. The fourth switch has first and second terminals, the first terminal coupled the terminal of the third switch and to the second terminals of the first and second capacitors. The voltage generator circuit has an output coupled to the second terminal of the fourth switch and is configured to provide a common mode output bias voltage at the second terminal of the fourth switch responsive to a common mode input bias voltage.

Input dependent common mode biasing

In some examples, apparatus comprises a multiplexer (MUX) adapted to be coupled to a set of battery cells and configured to provide a voltage of a different battery cell in the set of battery cells based on a MUX control signal. Apparatus comprises a comparator coupled to the MUX and configured to compare a MUX output signal to a threshold voltage to provide a comparator output signal. Apparatus comprises a digital control circuit configured to provide the MUX control signal to the MUX, to store the comparator output signal, and to use a logic AND gate to provide an AND gate output signal based on the stored comparator output signal.

Multi-cell battery fault indicator

An integrated circuit includes: a resistor terminal adapted to be coupled to a first end of a first resistor; a ground terminal adapted to be coupled to a second end of the first resistor; a second resistor in series with the first resistor and having a first end and a second end, the second end coupled to the resistor terminal; a first capacitor having a first capacitor terminal and a second capacitor terminal, the first capacitor terminal is coupled to: the first end of the second resistor via a first switch; and the ground terminal via a second switch; a second capacitor having a third capacitor terminal and a fourth capacitor terminal, the third capacitor terminal is coupled to: the first end of the second resistor via a third switch; the resistor terminal via a fourth switch; and the ground terminal via a fifth switch.

Sense circuit with sample capacitors and switch set for adjustable voltage sampling

A calibratable switched-capacitor voltage reference and an associated calibration method are described. The voltage reference includes dynamic diode elements providing diode voltages, input capacitor(s) for sampling input voltages, base-emitter capacitor(s) for sampling one diode voltage with respect to a ground, dynamically trimmable capacitor(s) for sampling the one diode voltage with respect to another diode voltage, and an operational amplifier coupled to the capacitors for providing reference voltage(s) based on the sampled input and diode voltages and on trims of the trimmable capacitor(s). The voltage reference can be configured as a first integrator of a modulator stage of a delta-sigma analog-to-digital converter.

Dynamic voltage reference for delta-sigma analog-to-digital converter (ADC) with temperature trim calibration

Aspects of the present disclosure provide for a circuit comprising a switch coupled between a first node and a second node, a first transistor having a gate terminal, a drain terminal coupled to the second node, and a source terminal coupled to a ground terminal, a logic gate having a first input, a second input coupled to a third node, and an output coupled to the gate terminal of the first transistor, and a comparator having a first input coupled to the second node, a second input coupled to a fourth node, and an output coupled to the first input of the logic gate.

Switch turn-off circuit

A battery pack includes a housing, a battery, a battery pack output voltage path that includes a charge power switch and a discharge power switch, and a battery sense output. A switch can be operably coupled between the battery and the battery sense output and configured to selectively open and close a battery sense path between the battery and the battery sense output. By one approach a first control circuit controls the open and close state of the aforementioned switch (in response, for example, to a comparison of the voltage differential across the switch to a predetermined threshold such that the switch is opened when the voltage differential across the switch becomes too positive or too negative with respect to battery voltage).

Battery sensing voltage controller

A monitoring circuit is implemented for comparing a sampled voltage taken from a selected sampling capacitor and a reference voltage from a voltage buffer (). The voltage buffer () is configurable according to programming provided to a programmable logic controller, PLC, (). Comparisons may be made on a periodic basis, such as a time-division multiplexed basis, in connection with register settings in the PLC ().

Programmable time-division multiplexed comparator

An energy storage element control circuit includes a charge transistor having a first node adapted to be coupled to an output node of the energy storage element control circuit and a second node adapted to be coupled to a terminal of an energy storage element. The energy storage control circuit also includes a boot capacitor having a first node and a second node. The energy storage element further includes a comparator that includes a first input node coupled to the first node of the charge transistor and a second input node adapted to be coupled to the terminal of the energy storage element. The comparator also includes an output node.

Energy storage element control circuit

A monitoring circuit is implemented for comparing a sampled voltage taken from a selected sampling capacitor and a reference voltage from a voltage buffer. The voltage buffer is configurable according to programming provided to a programmable logic controller, PLC. Comparisons may be made on a periodic basis, such as a time-division multiplexed basis, in connection with register settings in the PLC.

In a described example, an apparatus includes: a capacitor coupled to receive a current at a first terminal and having a second terminal coupled to ground; a first comparator coupled to a voltage at the first terminal of the capacitor and to a first reference voltage; a second comparator coupled to the voltage at the first terminal of the capacitor and to a second reference voltage that is different from the first reference voltage, and having an enable input coupled to the output of the first comparator; a discharge circuit coupled to the capacitor and enabled by the output of the second comparator; and a toggle circuit coupled to the output of the second comparator. Methods are disclosed.

Methods and apparatus for a low power relaxation oscillator

The disclosure presented herein provides example embodiments of systems for accurate multiplexing. The systems and methods presented may be suitable for non-limiting examples of analog to digital conversion with a switched input voltage (for a switched capacitor application) or any circuit with high voltage/high accuracy voltage multiplexing. In an example embodiment, pulsed current sources may be implemented to rapidly turn on and turn off the selected and unselected multiplexer ports while maintaining relatively low power consumption. A Kelvin input port may allow a high voltage input to be accurately sensed by avoiding a voltage drop associated with a selected pass gate p-channel FET channel resistance and parasitic wire resistance. The Kelvin input port biases the gate of a pass FET structure whose body terminals are allowed to remain floating.

Systems for accurate multiplexing

A linear regulator and a method of regulating a supply voltage are provided. Embodiments include a linear regulator with a first feedback loop and a second feedback loop. The first feedback loop is characterized by a first bandwidth and a first gain. The first feedback loop includes a first amplifier characterized by an output impedance which is significantly reduced in order to maximize the bandwidth of the first feedback loop when driving the capacitance of a control input of a series pass element. The second feedback loop is characterized by a second bandwidth and a second gain. The second feedback loop includes a second amplifier that controls the current in the first amplifier in the first feedback loop.

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Spicewood, TX, United States of America

Bradford Lawrence Hunter