Lsi Corporation

Lsi Logic Corporation

Avago Technologies General IP (singapore) Pte. Ltd.

Netapp, Inc.

Brad D Besmer

Stephen B Johnson

Brian A Day

Paul Ernest Soulier

Owen N Parry

Guy Kendall

Timothy E Hoglund

James A Rizzo

Naman Nair

Peter C Rivera

Gerald Edward Smith

Paul Jeffrey Smith

Christopher McCarty

Lawrence James Rawe

Mark J Jander

Nilesh Govande

Scott Dominguez

Jason McGinley

Ming-jen Wang

Jana Lynn Richards

Jameer Babasaheb Mulani

Jason B Schilling

Susan Gray

Gregory L Huff

Kevin A Mocklin

David J Golden

Minjen Wang

Roger T J Clegg

Edward F Marchand

The present invention is directed to a method and system for efficient write journal entry management maintaining minimum write journal information stored in a nonvolatile memory through utilizing an additional structure in a fast volatile memory. The method and system may manage write journaling of a file volume including multiple fixed sized regions and assign a persistent 1-bit synchronization status (the write journal information) to each data region. In addition, a non-persistent I/O counter (the additional structure) for each region to manage the persistent 1-bit synchronization status during run-time. The present invention may provide a mechanism to determine when write I/O operations have not successfully completed to a specific region of the file volume.

Method and system for efficient write journal entry management for a distributed file system

Methods and systems for configuring network storage are presented. A method for configuring network storage may include: detecting one more connection rates associated with one or more input PHYs associated with one or more parent devices; detecting a number of input connections associated with one or more PHYs associated with one or more parent devices; setting one or more connection rates associated with one or more input PHYs associated with one or more child devices according to the one or more connection rates associated with the one or more input PHYs associated with the one or more parent devices; and setting a number of input connections associated with one or more PHYs associated with one or more child devices according to a number of input connections associated with one or more PHYs associated with one or more parent devices.

SAS topology pathway analysis

Disclosed is a system and method for generating IO in PCIe devices and flow management of the IO.

Method and system for I/O flow management using RAID controller with DMA capabilitiy to directly send data to PCI-E devices connected to PCI-E switch

A storage system and method for identifying a faulty link the storage system is disclosed. The storage system includes a plurality of target devices and at least one expander configured to communicatively couple a plurality of initiators to the plurality of target devices. Each initiator of the plurality of initiators monitors occurrences of link disruptions independently, wherein upon detecting occurrences of a predetermined number of link disruptions within a predetermined time period, a reporting initiator reports a detection of a faulty link in the multi-initiator topology and requests an arbitrator to identify at least one peer initiator in the multi-initiator topology that shares at least one shared link with the reporting initiator. This reporting initiator and its peer initiators then jointly execute a common diagnostic process to identify the faulty link in the multi-initiator topology.

Fault detection and identification in a multi-initiator system

Methods and structure are disclosed for normalizing storage performance across a plurality of logical volumes. One embodiment is a storage controller. The storage controller is adapted to couple with a plurality of host systems and a storage device. The storage controller is adapted to receive one or more requests to create logical volumes for the plurality of hose systems, and adapted to identify a plurality of performance zones for storage areas of the storage device. The performance zones exhibit different performance criteria for one or more of: reading data from the storage device and writing data to the storage device. The storage controller is further adapted to allocate storage from each of the plurality of performance zones for each of the plurality of logical volumes such that the performance criteria for accessing the storage device is distributed substantially uniformly across the plurality of logical volumes.

Methods and structure for normalizing storage performance across a plurality of logical volumes

A storage system and method for preventing propagation of link reset among initiators in the storage system is disclosed. The method includes issuing a link reset command by the initiator, and entering the initiator into a back-off period immediately following the issuing of the link reset command. The initiator remains idle for the entire duration of the back-off period and resumes its operations at the end of the back-off period.

Providing multi-initiator serial advanced technology attachment support in a multi-initiator environment

The present invention is directed to a boot appliance for a data storage system. The boot appliance is a self-contained, pre-configured device that serves as a boot device for multiple servers. The boot appliance contains multiple hard drives which are configured into one or more RAID volumes. Each volume is divided into multiple partitions, with each partition serving as the boot drive for any server connected to it. The boot appliance provides its own environmental controls and Ethernet connection which may be used for providing alerts regarding the health of the components of the boot appliance and/or data storage system to a monitoring system, such as a network management system. The boot appliance may provide a boot drive and operating system image to multiple servers at the same time.

Storage system with boot appliance for improving reliability/availability/serviceability in high density server environments

A SAS expander or initiator places PHYs in a wide port into a persistent reduced power state by signaling to the connected SAS device that the SAS expander or initiator intends to route data traffic through other PHYs in the wide port. The SAS expander or initiator and connected SAS device agree to disuse certain PHYs so that the PHYs enter a reduced power state according to SAS standards.

Method for optimizing wide port power management in a SAS topology

An apparatus and method to allocate memory in a storage system. Firmware running the method uses an iterative approach to find the best optimal memory configuration for a particular storage system given a variety of configuration data parameters stored as persistent data in non-volatile flash memory. The configuration data relates to resources in the environment that the storage system is found in, such as the number of virtual ports, targets and initiators supported by a storage system IOC. The configuration data is alterable, to allow flexibility in updating and changing parameters, and is employed at runtime when the storage system powers on, to enable the most flexible resource allocation. In a preferred method of determining the most optimal memory configuration for a given set of parameters corresponding to a given set of resources, an iterative method is employed to decrement parameter values from their maximum values, taking into account the minimums, and then testing the configuration by performing a memory allocation. If the allocation fails, because for example the wrong type memory or size of memory for any of the resources found, then the firmware resets the memory areas back to predetermined Start of Day (SOD) parameter values, decrements the values until a successful configuration of memory is found for the given set of parameters, and tries again, or until the firmware is caused to fault, whichever comes first.

System and method for optimal dynamic resource allocation in a storage system

Methods and systems for improved management of power allocation among a plurality of devices coupled to a controller. The controller and devices exchange messages to request, grant, and release allocations of power from a common power supply. In some embodiments, the controller may be a SAS/SATA controller and the messages exchanged may be SAS/SATA frames and/or primitives. In exemplary embodiments, the messages may request/grant a particular amount of power for each of one or more voltage levels provided by the power supply. In other exemplary embodiments, the messages may designate the duration of time during which the requesting device may utilize the allocated power. A power status message from the device to the controller may indicate a change in the power consumption by the device. Responsive to the power status message the controller may re-allocate power previously allocated to a device that has completed use thereof.

Methods and apparatus for power allocation in a storage system

An apparatus and method are disclosed for maintaining consistent port and PHY configuration information in an SAS controller when connected SAS devices are rebooted, reset or otherwise temporarily disconnected. Configuration information is stored in non-volatile memory, and restored by a methodology to prevent port conflicts.

SAS controller with persistent port configuration

Circuits and associated methods for testing internal operation of an application integrated circuit. Features and aspects hereof add configurable test interrupt circuits to an application circuit design to permit dynamic, configurable interrupt generation from an integrated circuit based on conditions determined from monitoring of internal signals of the application circuit. The internal signals that may be tested and used to generate test interrupts are those not exposed to the external processor interface of the integrated circuit and thus may be configured to interrupt based on any internal state of the application specific functional circuits of the integrated circuit.

Circuits and associated methods for improved debug and test of an application integrated circuit

A memory management unit (MMU) for a device controller that provides enhanced functionality while maintaining a small physical size or footprint, such that the die size required to manufacture the memory management unit circuitry within the device controller integrated circuit device remains small notwithstanding such enhanced functionality. This compact/tiny MMU provides virtual memory addressing and memory error detection functionality while maintaining a small physical die size. The small physical die size with enhanced functionality is obtained by improvements in translating virtual to physical addressing without use of extensive translation tables, which themselves would otherwise consume memory and associated die real estate. In addition, the MMU allows a firmware image containing code and data segments to be run-time swapped between internal shared context RAM and external memory.

Compact memory management unit

Systems and methods for improving performance of a re-synchronization process in a RAID level 1 storage system. In one aspect a local cache memory associated with the second or mirrored disk drive is enabled during the re-synchronization operation but left disabled during normal operation processing host requests. The cache is flushed to the persistent medium of the second disk drive before resuming normal I/O request processing. In another aspect normal I/O request processing is interleaved with portions of the processing for re-synchronization of the mirrored disk drive. Normal I/O request processing proceeds for a first period of time. Re-synchronization processing for a portion of the mirrored information then proceeds (with local cache memory of the mirrored disk drive enabled) for a second period of time.

Growing community of inventors

Colorado Springs, CO, United States of America

Brad D Besmer