Motorola Corporation

Ikanos Communications, Inc.

Boris Zabarski

Oded Norman

Vadim Vayzer

Stefania Gandal

David Sitbon

The present invention provides techniques for efficiently determining a minimum or maximum of a plurality of values and the index of the minimum using registers of a processor. The present invention also provides for various processor instructions for determining the minimum/maximum and index of two or more values. The present invention finds particular benefit in implementing heaps and in systems utilizing Weighted Fair Queuing (WFQ).

Minimum processor instruction for implementing weighted fair queuing and other priority queuing

A method and a device for translating a hierarchical address, the device is adapted to receive a destination address, to search an array of sorted binary string being associated with a group of addresses reachable through the device, and to provide a best matching address, the device comprising: a content addressable memory module, for storing a first portion of the array of sorted binary strings; a fast memory module, for storing a second portion of the sorted binary strings; a memory module, for storing a remaining portion of the tree of sorted strings; and a search engine, coupled to the content addressable memory unit module, the fast memory module and the memory module, configured to receive a destination address, access at least the fast memory unit and the memory unit and to find the best matching address.

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Tel Aviv, Israel

Boris Zabarski