Samsung Electronics Co., Ltd.

Dorco Co., Ltd.

Clo Virtual Fashion Inc.

Bora Kim

Dohyung Kim

Namyoon Kong

Yeji Kim

Hyosung Lee

Hwanwook Park

Hyosun Ahn

Yunho Lee

Seungwoo Oh

Dongyoon Seo

Hoyoung Shin

Wonseop Lee

Miyeong Kang

DaWoon Han

JunHo Kim

Sunkak Jo

Suk Koo Hong

Kyoungyong Cho

Yejin Cho

Jaehwan Ma

Seungyeong Lee

Hyeji Kim

A random number generator includes a ring oscillator, an inversion selecting circuit, and controller. The ring oscillator includes an inverter chain having at least one inverter and generates an output signal. The inversion selecting circuit controlling a phase inverter configured to invert a signal of the inverter chain. The controller is configured to operate the inversion selecting circuit to provide an output of the first phase inverter to the inverter chain during a first operation mode to measure a frequency of the ring oscillator and operate the inversion selecting circuit to not provide the output of the phase inverter during a second operation mode for generating a random number.

Ring oscillator, random number generator including the same, and operation method of random number generator

A PCB includes a plurality of layers spaced apart in a vertical direction, a first detection pattern and a second detection pattern and pads connected to the first detection pattern and the second detection pattern. The first detection pattern and the second detection pattern are provided in a respective one of a first layer and a second layer adjacent to each other such that the first detection pattern and the second detection pattern are opposed to each other. The pads are provided in an outmost layer. Each of the first detection pattern and the second detection includes at least one main segment extending in at least one of first and second horizontal directions and a diagonal direction. A time domain reflectometry connected to a pair of pads detects a misalignment of the PCB by measuring differential characteristic impedance of the first detection pattern and the second detection pattern.

Printed circuit boards and memory modules

A grading method and apparatus for garments including supplemental materials is provided. The grading method and apparatus calculates three-dimensional (3D) strain information between a 3D source avatar and a 3D target avatar, calculates two-dimensional (2D) strain information of a 2D pattern corresponding to source garments draped over the 3D source avatar based on the 3D strain information, determines grading information for grading the 2D pattern to correspond to the 3D target avatar based on the 2D strain information, identifies at least one supplemental material included in the source garments, extracts at least one polygon matching the at least one supplemental material among a plurality of polygons modeling the 2D pattern, and performs grading on the at least one supplemental material based on grading information of the at least one polygon.

Grading garment that includes supplemental material

Pot lid handle

Embodiments of the inventive concept provide a method for manufacturing a semiconductor device. The method includes forming a stack structure by alternately and repeatedly stacking insulating layers and sacrificial layers on a substrate, sequentially forming a first lower layer and a first photoresist pattern on the stack structure, etching the first lower layer using the first photoresist pattern as an etch mask to form a first lower pattern. A first part of the stack structure is etched to form a stepwise structure using the first lower pattern as an etch mask. The first lower layer includes a novolac-based organic polymer, and the first photoresist pattern includes a polymer including silicon.

Method for manufacturing semiconductor device

A gate driver includes: a shift register and a gate signal generating unit. The shift register unit sequentially outputs scanning signals. The gate signal generating unit generates a normal gate signal and an inverted gate signal based on the scanning signals, controls a charge sharing operation of the normal gate signal and the inverted gate signal, and generates an output gate signal having a rising edge and a falling edge at which a voltage level of the output gate signal is increased and decreased by a charge sharing voltage.

Gate driver and method of driving display apparatus having the same

Growing community of inventors

Seoul, South Korea

Bora Kim